LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 289

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LAN9303MI-AKZE

Manufacturer Part Number
LAN9303MI-AKZE
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9303MI-AKZE

Lead Free Status / Rohs Status
Compliant
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
13.4.3.4
BITS
31:0
MAC Address
This field contains the first 32 bits of the ALR entry. These bits correspond
to the first 32 bits of the MAC address. Bit 0 holds the LSB of the first byte
(the multicast bit).
Switch Engine ALR Read Data 0 Register (SWE_ALR_RD_DAT_0)
This register is used in conjunction with the
(SWE_ALR_RD_DAT_1)
loaded via the Get First Entry or Get Next Entry commands in the
Register
the
Switch Engine ALR Read Data 1 Register (SWE_ALR_RD_DAT_1)
Register #:
(SWE_ALR_CMD). This register is only valid when either of the
to read the ALR table. It contains the first 32 bits of the ALR entry and is
1805h
DESCRIPTION
DATASHEET
289
Size:
Switch Engine ALR Read Data 1 Register
32 bits
Switch Engine ALR Command
are set.
Valid
TYPE
RO
or
Revision 1.4 (07-07-10)
End of Table
00000000h
DEFAULT
bits in

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