LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 265

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LAN9303MI-AKZE

Manufacturer Part Number
LAN9303MI-AKZE
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9303MI-AKZE

Lead Free Status / Rohs Status
Compliant
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
13.4.2.25
BITS
31:0
TX Deferred
Count of packets that were available for transmission but were deferred on
the first transmit attempt due to network traffic (either on receive or prior
transmission). This counter is not incremented on collisions. This counter is
incremented only in half-duplex operation.
Note:
Port x MAC Transmit Deferred Count Register (MAC_TX_DEFER_CNT_x)
This register provides a counter deferred packets. The counter is cleared upon being read.
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
Register #:
Port0: 0451h
Port1: 0851h
Port2: 0C51h
DESCRIPTION
DATASHEET
265
Size:
32 bits
TYPE
RC
Revision 1.4 (07-07-10)
00000000h
DEFAULT

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