LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 67

• Manufacturer Part Number: LAN9303MI-AKZE
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303MI-AKZE

• Lead Free Status / Rohs Status: Compliant

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
6.2.1
Switch Fabric CSR Writes
To perform a write to an individual Switch Fabric register, the desired data must first be written into the
Switch Fabric CSR Interface Data Register
p e r f o r m i n g a s i n g l e w r i t e t o t h e
(SWITCH_CSR_CMD)
field set to the desired register address, the
(AUTO_INC)
(CSR_BE[3:0])
Busy (CSR_BUSY)
A second write method may be used which utilizes the auto increment/decrement function of the
Switch Fabric CSR Interface Command Register (SWITCH_CSR_CMD)
addresses. When using this method, the
(SWITCH_CSR_CMD)
(AUTO_DEC)
address, the
all set). The write cycles are then initiated by writing the desired data into the
Interface Data Register
clearing of the
Interface Command Register (SWITCH_CSR_CMD)
user may then initiate a subsequent write cycle by writing the desired data into the
Interface Data Register
The third write method is to use the direct data range write function. Writes within the
CSR Interface Direct Data Registers (SWITCH_CSR_DIRECT_DATA)
the appropriate register address, set all four
Read/Write (R_nW)
Command Register
clearing of the
e x c e e d s
(SWITCH_CSR_DIRECT_DATA)
the
as detailed in
on page
Figure 6.1
Switch Fabric CSR Interface Direct Data Registers (SWITCH_CSR_DIRECT_DATA)
174.
illustrates the process required to perform a Switch Fabric CSR write.
t h a t
Read/Write (R_nW)
and
Table 13.4, “Switch Fabric CSR to SWITCH_CSR_DIRECT_DATA Address Range Map,”
bit set, the
bits selected. The completion of the write cycle is indicated by the clearing of the
CSR Busy (CSR_BUSY)
CSR Busy (CSR_BUSY)
Auto Decrement (AUTO_DEC)
o f
bit.
bit, and set the
(SWITCH_CSR_CMD). The completion of the write cycle is indicated by the
with the
must first be written with the
(SWITCH_CSR_DATA).
(SWITCH_CSR_DATA). The completion of the write cycle is indicated by the
t h e
CSR Address (CSR_ADDR[15:0])
S w i t c h
CSR Busy (CSR_BUSY)
address range, a sub-set of the Switch Fabric CSRs are mapped to
bit cleared, and the desired CSR byte enable bits selected (typically
DATASHEET
CSR Busy (CSR_BUSY)
F a b r i c
S w i t c h F a b r i c C S R I n t e r f a c e C o m m a n d R e g i s t e r
bit, at which time the address in the
bit. Since the address range of the Switch Fabric CSRs
67
(SWITCH_CSR_DATA). The write cycle is initiated by
Switch Fabric CSR Interface Command Register
Read/Write (R_nW)
CSR Byte Enable (CSR_BE[3:0])
fields cleared, and the desired
C S R
Auto Increment (AUTO_INC)
is incremented or decremented accordingly. The
bit set, the
I n t e r f a c e
bit of the
field written with the desired register
CSR Address (CSR_ADDR[15:0])
bit cleared, the
address range automatically set
D i r e c t
for writing sequential register
Switch Fabric CSR Interface
Revision 1.4 (07-07-10)
D a t a
Switch Fabric CSR
Switch Fabric CSR
or
Switch Fabric CSR
CSR Byte Enable
Auto Decrement
bits, clears the
Auto Increment
address range
Switch Fabric
R e g i s t e r s
CSR