LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 283
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LAN9303MI-AKZE
Manufacturer Part Number
LAN9303MI-AKZE
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9303MI-AKZE.pdf
(381 pages)
Specifications of LAN9303MI-AKZE
Lead Free Status / Rohs Status
Compliant
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Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
13.4.2.43
BITS
31:8
7:0
RESERVED
RESERVED
Note:
Port x MAC Interrupt Mask Register (MAC_IMR_x)
This register contains the Port x interrupt mask. Port x related interrupts in the
Pending Register (MAC_IPR_x)
corresponding bit of this register. Clearing a bit will unmask the interrupt. Refer to
Interrupts," on page 62
Note: There are no possible Port x interrupt conditions available. This register exists for future use,
These bits must be written as 11h
and should be configured as indicated for future compatibility.
Register #:
for more information.
Port0: 0480h
Port1: 0880h
Port2: 0C80h
DESCRIPTION
may be masked via this register. An interrupt is masked by setting the
DATASHEET
283
Size:
32 bits
TYPE
R/W
RO
Port x MAC Interrupt
Revision 1.4 (07-07-10)
Chapter 5, "System
DEFAULT
11h
-
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