MT48H8M32LFB5-10:G Micron Technology Inc, MT48H8M32LFB5-10:G Datasheet - Page 31

• Manufacturer Part Number: MT48H8M32LFB5-10:G
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M32LFB5-10:G

• Organization: 8Mx32
• Density: 256Mb
• Address Bus: 14b
• Access Time (max): 17/8/7ns
• Maximum Clock Rate: 104MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 65mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Table 10: Truth Table – Current State Bank n, Command To Bank m
Notes: 1-6; notes appear below and on next page
NOTE:
pdf: 09005aef80d460f2, source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. D 9/04 EN
1. This table applies when CKE
2. This table describes alternate bank operation, except where noted; i.e., the current state is for bank n and the com-
3. Current state definitions:
4. AUTO REFRESH, SELF REFRESH and LOAD MODE REGISTER commands may only be issued when all banks are idle.
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank represented by the current
6. All states and sequences not shown are illegal or reserved.
Precharging
(With Auto
(With Auto
ous state was self refresh).
mands shown are those allowed to be issued to bank m (assuming that bank m is in such a state that the given com-
mand is allowable). Exceptions are covered in the notes below.
Idle: The bank has been precharged, and
Row Active: A row in the bank has been activated, and
Read: A READ burst has been initiated, with auto precharge disabled, and has not yet terminated or been termi-
Write: A WRITE burst has been initiated, with auto precharge disabled, and has not yet terminated or been termi-
Read w/Auto Precharge Enabled: Starts with registration of a READ command with auto precharge enabled, and
Write w/Auto Precharge Enabled: Starts with registration of a WRITE command with auto precharge enabled, and
state only.
Activating,
Precharge)
Precharge)
CURRENT
Precharge
Precharge
Active, or
Disabled)
Disabled)
accesses are in progress.
nated.
nated.
ends when
ends when
STATE
(Auto
(Auto
Write
Write
Read
Read
Row
Any
Idle
t
t
RP has been met. Once
RP has been met. Once
CS#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS
X
H
X
H
H
H
H
H
H
H
H
H
H
#
L
L
L
L
L
L
L
L
L
L
n-1
CAS
X
H
X
H
H
H
H
H
H
H
H
H
H
#
L
L
L
L
L
L
L
L
L
L
was HIGH and CKE
WE# COMMAND (ACTION)
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
t
t
RP is met, the bank will be in the idle state.
RP is met, the bank will be in the idle state.
t
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
Any Command Otherwise Allowed to Bank m
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
RP has been met.
n
is HIGH (see Truth Table 2) and after tXSR has been met (if the previ-
t
RCD has been met. No data bursts/accesses and no register
31
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MOBILE SDRAM
©2003 Micron Technology, Inc. All rights reserved.
256Mb: x32
PRELIMINARY
NOTES
7, 8, 14
7, 8, 15
7, 8, 16
7, 8, 17
7, 10
7, 11
7, 12
7, 13
7
7
9
9
9
9