MAX5858AECM+TD Maxim Integrated Products, MAX5858AECM+TD Datasheet - Page 15

• Manufacturer Part Number: MAX5858AECM+TD
• Description: IC DAC 10BIT DUAL 300MSPS 48TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX5858AECM+TD

• Settling Time: 11ns
• Number Of Bits: 10
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 816mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

At power-up, the MAX5858A is configured in no-inter-
polation mode with a gain adjustment setting of 0dB
and a fully operational converter. In shutdown, the
MAX5858A consumes only 1µA of supply current, and
in standby the current consumption is 4.4mA. Wake-up
time from standby mode to normal operation is 0.7µs.
The MAX5858A features a two stage, 2x digital interpolat-
ing filter based on 43-tap and 23-tap FIR topology. F1EN
and F2EN enable the interpolation filters. F1EN = 1
enables the first filter for 2x interpolation and F2EN = 2
enables the second filter for combined 4x interpolation. To
bypass and disable both interpolation filters (no-interpola-
tion mode or 1x mode) set F1EN = F2EN = 0. When set for
1x mode the filters are powered down and consume virtu-
ally no current. An illegal condition is defined by: F1EN =
0, F2EN = 1 (see Table 2 for configuration modes).
Table 1. Control Word Format and Function
Table 2. Configuration Modes
X = Don’t care.
F1EN = 0, F2EN = 1: illegal condition
CONTROL WORD
No interpolation
2x interpolation
4x interpolation
Power-down
MSB
PD
Power-up
Standby
MODE
DACEN
F2EN
F1EN
PD
G3
G2
G1
G0
DACEN
Dual, 10-Bit, 300Msps, DAC with 4x/2x/1x
______________________________________________________________________________________
Power-down: The part enters power-down mode if PD = 1.
DAC Enable: When DACEN = 0 and PD = 0, the part enters standby mode.
Filter Enable: When F2EN = 1 and F1EN = 1, 4x interpolation is enabled. When F2EN = 0, the interpolation
mode is determined by F1EN.
Filter Enable: When F1EN = 1 and F2EN = 0, 2x interpolation is active. With F1EN = 0 and F2EN = 0, the
interpolation is disabled.
Bit 3 (MSB) of gain adjust word.
Bit 2 of gain adjust word.
Bit 1 of gain adjust word.
Bit 0 (LSB) of gain adjust word.
PD
0
0
0
0
1
0
F2EN
Device Power-Up and
DACEN
Interpolation Filters
States of Operation
1
1
1
0
X
1
F1EN
F2EN
X
X
X
0
0
1
Interpolation Filters and PLL
F1EN
0
1
1
X
X
X
G3
The programmable interpolation filters multiply the
MAX5858A input data rate by a factor of two or four to
separate the reconstructed waveform spectrum and the
first image. The original spectral images, appearing
around multiples of the DAC input data rate, are attenu-
ated at least 60dB by the internal digital filters. This fea-
ture provides three benefits:
1)
2)
3)
Figure 2 shows an application circuit and Figure 3 illus-
trates a practical example of the benefits when using
the MAX5858A with 4x-interpolation mode. The exam-
ple illustrates signal synthesis of a 20MHz IF with a
±10MHz bandwidth. Three options can be considered
to address the design requirements. The tradeoffs for
each solution are depicted in Table 4.
Table 3. Gain Difference Setting
G2
FUNCTION
GAIN ADJUSTMENT ON
Image separation reduces complexity of analog
reconstruction filters.
Lower input data rates eliminate board level high-
speed data transmission.
Sin(x)/x roll-off is reduced over the effective band-
width.
CHANNEL A (dB)
-0.35
+0.4
G1
0
G0
G3
0
1
1
X
G2
0
0
1
G1
0
0
1
LSB
X
G0
0
0
1
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