ADSP-21371KSWZ-2B Analog Devices Inc, ADSP-21371KSWZ-2B Datasheet - Page 41

• Manufacturer Part Number: ADSP-21371KSWZ-2B
• Description: IC DSP 32BIT 266MHZ 208-LQFP
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21371KSWZ-2B

• Package / Case: 208-LQFP
• Interface: DAI, DPI
• Operating Temperature: 0°C ~ 70°C
• Clock Rate: 266MHz
• Non-volatile Memory: ROM (512 kB)
• On-chip Ram: 128kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Mounting Type: Surface Mount
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 21371
• Core Frequency Typ: 266MHz
• Dsp Type: Floating Point
• Mmac: 532
• No. Of Pins: 208
• Interface Type: SPI, UART
• Rohs Compliant: Yes
• Operating Temperature Range: 0°C To +70°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPI Interface—Slave
Table 38. SPI Interface Protocol—Slave Switching and Timing Specifications
Parameter
Timing Requirements
t
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
t
SPICLKS
SPICHS
SPICLS
SDSCO
HDS
SSPIDS
HSPIDS
SDPPW
DSOE
DSDHI
DDSPIDS
HDSPIDS
DSOV
CPHASE = 1
CPHASE = 0
(OUTPUT)
(OUTPUT)
(INPUT)
SPICLK
(CP = 0)
(INPUT)
SPICLK
(CP = 1)
(INPUT)
(INPUT)
(INPUT)
SPIDS
MISO
MOSI
MISO
MOSI
Serial Clock Cycle
Serial Clock High Period
Serial Clock Low Period
SPIDS Assertion to First SPICLK Edge
CPHASE = 0
CPHASE = 1
Last SPICLK Edge to SPIDS Not Asserted (CPHASE=0)
Data Input Valid to SPICLK edge (Data Input Set-up Time)
SPICLK Last Sampling Edge to Data Input Not Valid
SPIDS Deassertion Pulse Width (CPHASE=0)
SPIDS Assertion to Data Out Active
SPIDS Deassertion to Data High Impedance
SPICLK Edge to Data Out Valid (Data Out Delay Time)
SPICLK Edge to Data Out Not Valid (Data Out Hold Time)
SPIDS Assertion to Data Out Valid (CPHASE = 0)
t
t
t
SDSCO
DSOE
DSOV
t
t
SPICHS
SSPIDS
t
DDSPIDS
MSB
MSB VALID
t
SPICLS
Rev. C | Page 41 of 52 | September 2009
MSB VALID
MSB
t
DDSPIDS
Figure 31. SPI Slave Timing
t
t
SPICLS
SPICHS
t
SSPIDS
t
DDSPIDS
LSB VALID
t
SPICLKS
Min
4 × t
2 × t
2 × t
2 × t
2 × t
2 × t
2
2
0
0
2 × t
2 × t
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
LSB
t
HDSPIDS
t
SSPIDS
LSB VALID
ADSP-21371/ADSP-21375
– 2
– 2
– 2
t
HSPIDS
1.2 V, 266 MHz
t
HSPIDS
t
HDS
LSB
Max
6.8
6.8
9.5
5 × t
PCLK
t
SDPPW
t
t
t
DSDHI
HDSPIDS
DSDHI
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns