ADSP-21371KSWZ-2B Analog Devices Inc, ADSP-21371KSWZ-2B Datasheet - Page 43

IC DSP 32BIT 266MHZ 208-LQFP

ADSP-21371KSWZ-2B

Manufacturer Part Number
ADSP-21371KSWZ-2B
Description
IC DSP 32BIT 266MHZ 208-LQFP
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Floating Pointr

Specifications of ADSP-21371KSWZ-2B

Package / Case
208-LQFP
Interface
DAI, DPI
Operating Temperature
0°C ~ 70°C
Clock Rate
266MHz
Non-volatile Memory
ROM (512 kB)
On-chip Ram
128kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Mounting Type
Surface Mount
Svhc
No SVHC (18-Jun-2010)
Base Number
21371
Core Frequency Typ
266MHz
Dsp Type
Floating Point
Mmac
532
No. Of Pins
208
Interface Type
SPI, UART
Rohs Compliant
Yes
Operating Temperature Range
0°C To +70°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21371KSWZ-2B
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADSP-21371KSWZ-2B
Manufacturer:
ADI/亚德诺
Quantity:
20 000
TWI Controller Timing
Table 40
interface. Input signals (SCL, SDA) are routed to the
DPI_P14–1 pins using the SRU. Therefore, the timing specifica-
tions provided below are valid at the DPI_P14–1 pins.
Table 40. Characteristics of the SDA and SCL Bus Lines for F/S-Mode TWI Bus Devices
1
Parameter
f
t
t
t
t
t
t
t
t
t
All values referred to V
SCL
HDSTA
LOW
HIGH
SUSTA
HDDAT
SUDAT
SUSTO
BUF
SP
and
Figure 33
SCL Clock Frequency
Hold Time (repeated) Start Condition. After This
Period, the First Clock Pulse is Generated.
Low Period of the SCL Clock
High Period of the SCL Clock
Setup Time for a Repeated Start Condition
Data Hold Time for TWI-Bus Devices
Data Setup Time
Setup Time for Stop Condition
Bus Free Time Between a Stop and Start Condition
Pulse Width of Spikes Suppressed By the Input Filter n/a
IHmin
provide timing information for the TWI
DPI_P14–1
DPI_P14–1
and V
SDA
SCL
ILmax
levels.
S
For more information, see Electrical Characteristics on page 16.
t
LOW
t
HDSTA
Figure 33. Fast and Standard Mode Timing on the TWI Bus
t
HDDAT
Rev. C | Page 43 of 52 | September 2009
t
HIGH
t
SUDAT
t
SUSTA
Min
0
4.0
4.7
4.0
4.7
0
250
4.0
4.7
Sr
Standard Mode
t
HDSTA
Max
100
n/a
1
t
SUSTO
t
ADSP-21371/ADSP-21375
SP
Min
0
0.6
1.3
0.6
0.6
0
100
0.6
1.3
0
P
t
BUF
Fast Mode
S
Max
400
50
Unit
kHz
μs
μs
μs
μs
μs
μs
μs
ns
ns

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