EP3C25F324C8N Altera, EP3C25F324C8N Datasheet - Page 251
![IC CYCLONE III FPGA 25K 324-FBGA](/photos/6/70/67067/544-324-fbga_sml.jpg)
EP3C25F324C8N
Manufacturer Part Number
EP3C25F324C8N
Description
IC CYCLONE III FPGA 25K 324-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C25F324C8N.pdf
(274 pages)
Specifications of EP3C25F324C8N
Number Of Logic Elements/cells
24624
Number Of Labs/clbs
1539
Total Ram Bits
608256
Number Of I /o
215
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
24624
# I/os (max)
215
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
24624
Ram Bits
608256
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.544-2370 - KIT STARTER CYCLONE III EP3C25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2078
EP3C25F324C8NES
EP3C25F324C8NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C25F324C8N
Manufacturer:
ALTERA
Quantity:
2 350
Company:
Part Number:
EP3C25F324C8N
Manufacturer:
ALTERA
Quantity:
160
Company:
Part Number:
EP3C25F324C8N
Manufacturer:
ALTERA53
Quantity:
612
Part Number:
EP3C25F324C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP3C25F324C8NES
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 10: Hot-Socketing and Power-On Reset in the Cyclone III Device Family
Hot-Socketing Feature Implementation
Hot-Socketing Feature Implementation
Figure 10–1. Hot-socketing Circuit Block Diagram for Cyclone III Device Family
© December 2009
1
Altera Corporation
Each I/O pin has the circuitry shown in
not include CONF_DONE, nCEO, and nSTATUS pins to ensure that they are able to
operate during configuration. Thus, it is expected behavior for these pins to drive out
during power up and power down sequences.
Figure 10–1
family.
The POR circuit monitors the voltage level of power supplies and keeps the I/O pins
tristated until the device is in user mode. The weak pull-up resistor (R) in Cyclone III
device family I/O element (IOE) keeps the I/O pins from floating. The 3.0-V tolerance
control circuit permits the I/O pins to be driven by 3.0 V before V
supplies are powered up, and it prevents the I/O pins from driving out when the
device is not in user mode.
Altera uses GND as reference for hot-socketing operation and I/O buffer designs. To
ensure proper operation, Altera recommends connecting the GND between boards
before connecting the power supplies. This prevents the GND on your board from
being pulled up inadvertently by a path to power through other components on your
board. A pulled up GND can otherwise cause an out-of-specification I/O voltage or
current condition with the Altera
Resistor
Pull-Up
Weak
PAD
shows the hot-socketing circuit block diagram for Cyclone III device
R
V
CCIO
®
Input Buffer
to Logic Array
Tolerance
device.
Voltage
Control
Figure
Output Enable
10–1. The hot-socketing circuit does
Hot Socket
Pre-Driver
Output
Power On
Monitor
Reset
Cyclone III Device Handbook, Volume 1
CCIO
, V
CC
, and V
CCA
10–3