EP3C25F324C8N Altera, EP3C25F324C8N Datasheet - Page 273
![IC CYCLONE III FPGA 25K 324-FBGA](/photos/6/70/67067/544-324-fbga_sml.jpg)
EP3C25F324C8N
Manufacturer Part Number
EP3C25F324C8N
Description
IC CYCLONE III FPGA 25K 324-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C25F324C8N.pdf
(274 pages)
Specifications of EP3C25F324C8N
Number Of Logic Elements/cells
24624
Number Of Labs/clbs
1539
Total Ram Bits
608256
Number Of I /o
215
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
24624
# I/os (max)
215
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
24624
Ram Bits
608256
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.544-2370 - KIT STARTER CYCLONE III EP3C25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2078
EP3C25F324C8NES
EP3C25F324C8NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
EP3C25F324C8N
Manufacturer:
ALTERA
Quantity:
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ALTERA
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Manufacturer:
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Part Number:
EP3C25F324C8NES
Manufacturer:
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Quantity:
20 000
Chapter 12: IEEE 1149.1 (JTAG) Boundary-Scan Testing for the Cyclone III Device Family
Boundary-Scan Description Language Support
Boundary-Scan Description Language Support
Chapter Revision History
Table 12–4. Chapter Revision History
© December 2009
December 2009
July 2009
June 2009
October 2008
May 2008
Date
f
1
Altera Corporation
■
The boundary-scan description language (BSDL), a subset of VHDL, provides a
syntax that allows you to describe the features of an IEEE Std. 1149.1 BST-capable
device that can be tested. To download BSDL files for IEEE Std. 1149.1-compliant
Cyclone III device family, visit the
BSDL files for IEEE std. 1149.1-compliant Cyclone III LS devices can also be generated
using version 9.0 and later of the Quartus II software.
To perform BST on a configured device, a post configuration BSDL file that is
customized to your design is required. Post configuration BSDL file generation with
BSDL Customizer script (available on the
devices only.
Use version 9.0 and later of the Quartus II software to create a post configuration
BSDL file for Cyclone III LS devices.
For information on the procedures to generate the generic and post configuration
BSDL files with Quartus II software, visit the
Table 12–4
The following private instructions must not be used as they might render the
device inoperable:
1000010000
1001000000
1011100000
You should take precautions not to invoke these instructions at any time.
Version
2.2
2.1
2.0
1.3
1.2
lists the revision history for this chapter.
Minor changes to the text.
Made minor correction to the part number.
■
■
Updated chapter to new template.
Minor textual changes.
Updated “Introduction” on page 12–1, “IEEE Std. 1149.1 BST Architecture”
on page 12–1, “IEEE Std. 1149.1 BST Operation Control” on page 12–2,
“Guidelines for IEEE Std. 1149.1 BST” on page 12–6, and “Boundary-Scan
Description Language Support” on page 12–7.
Updated Table 12–1 on page 12–2, Table 12–2 on page 12–2, and Table 12–3
on page 12–3.
Altera Download
Altera Download
Changes Made
Altera Download
Center.
Cyclone III Device Handbook, Volume 1
Center) is for Cyclone III
Center.
12–7