EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 51
EP2AGX190FF35C6N
Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX190FF35C6N.pdf
(306 pages)
Specifications of EP2AGX190FF35C6N
Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 3: Memory Blocks in Arria II GX Devices
Memory Modes
Figure 3–12. Arria II GX Simple Dual-Port Timing Waveforms for M9K
Figure 3–13. Arria II GX Simple Dual-Port Timing Waveforms for MLAB
True Dual-Port Mode
© November 2009
q (asynch)
wraddress
q (asynch)
rdaddress
wraddress
rdaddress
wrclock
wrclock
rdclock
rdclock
wren
data
rden
wren
data
rden
Altera Corporation
doutn-1
din-1
doutn-1
din-1
an-1
an-1
Figure 3–13
dual-port mode with unregistered outputs in the MLAB. The write operation is
triggered by the falling clock edges.
Arria II GX M9K blocks support true dual-port mode. Sometimes called bi-directional
dual-port, this mode allows you to perform any combination of two port operations:
two reads, two writes, or one read and one write at two different clock frequencies.
Figure 3–14
bn
bn
an
an
din
din
shows the timing waveforms for read and write operations in simple
shows the true dual-port RAM configuration.
doutn
doutn
b0
a0
b0
a0
a1
a1
dout0
dout0
a2
b1
b1
a2
a3
a3
din4
b2
din4
b2
a4
a4
Arria II GX Device Handbook, Volume 1
din5
din5
a5
a5
b3
b3
a6
a6
din6
din6
3–11
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