EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 65

• Manufacturer Part Number: EP2AGX190FF35C6N
• Description: IC ARRIA II GX 190K 1152FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190FF35C6N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 612
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 612
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 4: DSP Blocks in Arria II GX Devices
Operational Modes Overview
Figure 4–3. Output Cascading Feature for FIR Structures
Operational Modes Overview
Table 4–2. Arria II GX DSP Block Operational Modes (Part 1 of 2)
© July 2010
Four-Multiplier
Two-Multiplier
Independent
Accumulate
Multiplier
Adder
Multiply
Mode
Adder
(1)
Input
Data
Altera Corporation
Half-DSP Block
144
Multiplier
in Width
12-bits
18-bits
36-bits
Double
18-bits
18-bits
18-bits
9-bits
You can use each Arria II GX DSP block in one of six basic operational modes.
Table 4–2
can implement in a single DSP block.
Number of
Multiplier
lists the six basic operational modes and the number of multipliers that you
1
1
1
1
1
2
4
4
Block
# per
2
8
6
4
2
2
4
2
Signed
Signed or
Unsigned
Both
Both
Both
Both
Both
Both
Both
(2)
From Previous Half-DSP Block
RND,
SAT
Yes
Yes
Yes
Yes
No
No
No
No
To Next
Half-DSP Block
44
Register
In Shift
Yes
Yes
Yes
No
No
No
No
No
44
Arria II GX Device Handbook, Volume 1
Chainout
Adder
Yes
Yes
No
No
No
No
No
No
1st Stage
Add/Sub
44
Result[]
Both
Both
Both
—
—
—
—
—
2nd Stage
Add Only
Add/Acc
Both
4–5
—
—
—
—
—
—