MPC857DSLVR50B Freescale Semiconductor, MPC857DSLVR50B Datasheet - Page 18

IC MPU POWERQUICC 50MHZ 357-PBGA

MPC857DSLVR50B

Manufacturer Part Number
MPC857DSLVR50B
Description
IC MPU POWERQUICC 50MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC857DSLVR50B

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC85xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Bus Signal Timing
18
B17a CLKOUT to KR, RETRY, CR valid
B22a CLKOUT falling edge to CS asserted
B22b CLKOUT falling edge to CS asserted
B24a A(0:31) and BADDR(28:30) to CS
Num
B22c CLKOUT falling edge to CS asserted
B18 D(0:31), DP(0:3) valid to CLKOUT
B19 CLKOUT rising edge to D(0:31),
B20 D(0:31), DP(0:3) valid to CLKOUT
B21 CLKOUT falling edge to D(0:31),
B22 CLKOUT rising edge to CS asserted
B23 CLKOUT rising edge to CS negated
B24 A(0:31) and BADDR(28:30) to CS
B25 CLKOUT rising edge to OE, WE(0:3)
B26 CLKOUT rising edge to OE negated
(hold time) (MIN = 0.00 x B1 + 2.00)
rising edge (setup time)
x B1 + 6.00)
DP(0:3) valid (hold time)
x B1 + 1.00
falling edge (setup time)
x B1 + 4.00)
DP(0:3) valid (hold Time)
0.00 x B1 + 2.00)
GPCM ACS = 00 (MAX = 0.25 x B1 +
6.3)
GPCM ACS = 10, TRLX = 0 (MAX =
0.00 x B1 + 8.00)
GPCM ACS = 11, TRLX = 0, EBDF =
0 (MAX = 0.25 x B1 + 6.3)
GPCM ACS = 11, TRLX = 0, EBDF =
1 (MAX = 0.375 x B1 + 6.6)
GPCM read access, GPCM write
access ACS = 00, TRLX = 0 & CSNT =
0 (MAX = 0.00 x B1 + 8.00)
asserted GPCM ACS = 10, TRLX = 0
(MIN = 0.25 x B1 - 2.00)
asserted GPCM ACS = 11 TRLX = 0
(MIN = 0.50 x B1 - 2.00)
asserted (MAX = 0.00 x B1 + 9.00)
(MAX = 0.00 x B1 + 9.00)
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Characteristic
9
)
8
10
8
Table 7. Bus Operation Timings (continued)
10
(MIN = 0.00
(MIN = 0.00
(MIN = 0.00
(MIN =
10.90
13.20
2.00
6.00
1.00
4.00
2.00
7.60
7.60
2.00
5.60
2.00
Min
33 MHz
13.80
13.80
18.00
Max
8.00
8.00
9.00
9.00
10.90
10.50
2.00
6.00
1.00
4.00
2.00
6.30
6.30
2.00
4.30
2.00
Min
40 MHz
12.50
12.50
18.00
Max
8.00
8.00
9.00
9.00
2.00
6.00
1.00
4.00
2.00
5.00
5.00
7.00
2.00
3.00
8.00
2.00
Min
50 MHz
11.30
11.30
14.30
Max
8.00
8.00
9.00
9.00
Freescale Semiconductor
2.00
6.00
2.00
4.00
2.00
3.80
3.80
5.20
2.00
1.80
5.60
2.00
Min
66 MHz
10.00
10.00
12.30
Max
8.00
8.00
9.00
9.00
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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