MPC857DSLVR50B Freescale Semiconductor, MPC857DSLVR50B Datasheet - Page 69

IC MPU POWERQUICC 50MHZ 357-PBGA

MPC857DSLVR50B

Manufacturer Part Number
MPC857DSLVR50B
Description
IC MPU POWERQUICC 50MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC857DSLVR50B

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC85xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Figure 71
Figure 72
13 FEC Electrical Characteristics
This section provides the AC electrical specifications for the Fast Ethernet controller (FEC). Note that the
timing specifications for the MII signals are independent of system clock frequency (part speed
designation). Furthermore, MII signals use TTL signal levels compatible with devices operating at either
5.0 or 3.3 V.
Freescale Semiconductor
UtpClk
PHREQn
RxClav
RxEnb
UTPB
SOC
UtpClk
PHSELn
TxClav
TxEnb
UTPB
SOC
shows signal timings during UTOPIA receive operations.
shows signal timings during UTOPIA transmit operations.
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
U5
U5
HighZ at MPHY
5
HighZ at MPHY
Figure 72. UTOPIA Transmit Timing
Figure 71. UTOPIA Receive Timing
U2
U2
2
2
U5
5
U3
U3
U1
3
U1
3
1
U4
U4
4
4
U1
U1
U3
3
FEC Electrical Characteristics
HighZ at MPHY
HighZ at MPHY
U4
4
69

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