MPC857DSLVR50B Freescale Semiconductor, MPC857DSLVR50B Datasheet - Page 37

IC MPU POWERQUICC 50MHZ 357-PBGA

MPC857DSLVR50B

Manufacturer Part Number
MPC857DSLVR50B
Description
IC MPU POWERQUICC 50MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC857DSLVR50B

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC85xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC857DSLVR50B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table 9
Freescale Semiconductor
1
P44
P45
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
Num
PSHT = 0. Otherwise add PSHT times cycle time.
These synchronous timings define when the WAITx signals are detected in order to freeze (or relieve) the PCMCIA
current cycle. The WAITx assertion will be effective only if it is detected 2 cycles before the PSL timer expiration. See
PCMCIA Interface in the MPC862 PowerQUICC User s Manual .
PSST = 1. Otherwise add PSST times cycle time.
shows the PCMCIA timing for the MPC862/857T/857DSL.
A(0:31), REG valid to PCMCIA
Strobe asserted.
B1 - 2.00)
A(0:31), REG valid to ALE
negation.
2.00)
CLKOUT to REG valid (MAX =
0.25 x B1 + 8.00)
CLKOUT to REG Invalid. (MIN =
0.25 x B1 + 1.00)
CLKOUT to CE1, CE2 asserted.
(MAX = 0.25 x B1 + 8.00)
CLKOUT to CE1, CE2 negated.
(MAX = 0.25 x B1 + 8.00)
CLKOUT to PCOE, IORD, PCWE,
IOWR assert time. (MAX = 0.00 x
B1 + 11.00)
CLKOUT to PCOE, IORD, PCWE,
IOWR negate time. (MAX = 0.00 x
B1 + 11.00)
CLKOUT to ALE assert time
(MAX = 0.25 x B1 + 6.30)
CLKOUT to ALE negate time
(MAX = 0.25 x B1 + 8.00)
PCWE, IOWR negated to D(0:31)
invalid.
WAITA and WAITB valid to
CLKOUT rising edge.
0.00 x B1 + 8.00)
CLKOUT rising edge to WAITA
and WAITB invalid.
B1 + 2.00)
1
(MIN = 0.25 x B1 - 2.00)
Characteristic
1
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
(MIN = 1.00 x B1 -
1
1
(MIN = 0.75 x
(MIN = 0.00 x
1
(MIN =
20.70
28.30
Table 9. PCMCIA Timing
7.60
8.60
7.60
7.60
2.00
7.60
5.60
8.00
2.00
Min
33 MHz
15.60
15.60
15.60
11.00
11.00
13.80
15.60
Max
16.70
23.00
6.30
7.30
6.30
6.30
2.00
6.30
4.30
8.00
2.00
Min
40 MHz
14.30
14.30
14.30
11.00
11.00
12.50
14.30
Max
13.00
18.00
5.00
6.00
5.00
5.00
2.00
5.00
3.00
8.00
2.00
Min
50 MHz
13.00
13.00
13.00
11.00
11.00
11.30
13.00
Max
13.20
9.40
3.80
4.80
3.80
3.80
2.00
3.80
1.80
8.00
2.00
Min
66 MHz
11.80
11.80
11.80
11.00
11.00
10.00
11.80
Max
Bus Signal Timing
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
37

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