MPC857DSLVR50B Freescale Semiconductor, MPC857DSLVR50B Datasheet - Page 21

• Manufacturer Part Number: MPC857DSLVR50B
• Description: IC MPU POWERQUICC 50MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC857DSLVR50B

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Processor Series: MPC85xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465/3.6V
• Operating Supply Voltage (min): 2/3.135V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
B30d WE(0:3) negated to A(0:31),
B31a CLKOUT falling edge to CS valid - as
B31b CLKOUT rising edge to CS valid - as
B31d CLKOUT falling edge to CS valid, as
B32a CLKOUT falling edge to BS valid - as
B32b CLKOUT rising edge to BS valid - as
Num
B30c WE(0:3) negated to A(0:31),
B31c CLKOUT rising edge to CS valid- as
B31 CLKOUT falling edge to CS valid - as
B32 CLKOUT falling edge to BS valid- as
BADDR(28:30) invalid GPCM write
access, TRLX = 0, CSNT = 1.
CS negated to A(0:31) invalid GPCM
write access, TRLX = 0, CSNT = 1
ACS = 10, ACS == 11, EBDF = 1
(MIN = 0.375 x B1 - 3.00)
BADDR(28:30) invalid GPCM write
access TRLX = 1, CSNT =1,
CS negated to A(0:31) invalid GPCM
write access TRLX = 1, CSNT = 1,
ACS = 10 or 11, EBDF = 1
requested by control bit CST4 in the
corresponding word in the UPM
(MAX = 0.00 X B1 + 6.00)
requested by control bit CST1 in the
corresponding word in the UPM
(MAX = 0.25 x B1 + 6.80)
requested by control bit CST2 in the
corresponding word in the UPM
(MAX = 0.00 x B1 + 8.00)
requested by control bit CST3 in the
corresponding word in the UPM
(MAX = 0.25 x B1 + 6.30)
requested by control bit CST1 in the
corresponding word in the UPM
EBDF = 1 (MAX = 0.375 x B1 + 6.6)
requested by control bit BST4 in the
corresponding word in the UPM
(MAX = 0.00 x B1 + 6.00)
requested by control bit BST1 in the
corresponding word in the UPM,
EBDF = 0 (MAX = 0.25 x B1 + 6.80)
requested by control bit BST2 in the
corresponding word in the UPM
(MAX = 0.00 x B1 + 8.00)
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Characteristic
Table 7. Bus Operation Timings (continued)
38.67
8.40
1.50
7.60
1.50
7.60
9.40
1.50
7.60
1.50
Min
33 MHz
14.30
13.80
18.00
14.30
Max
6.00
8.00
6.00
8.00
—
—
31.38
6.40
1.50
6.30
1.50
6.30
7.60
1.50
6.30
1.50
Min
40 MHz
13.00
12.50
16.00
13.00
Max
6.00
8.00
6.00
8.00
—
—
24.50
13.30
4.50
1.50
5.00
1.50
5.00
1.50
5.00
1.50
Min
50 MHz
11.80
11.30
14.10
11.80
Max
6.00
8.00
6.00
8.00
—
—
17.83
11.30
2.70
1.50
3.80
1.50
3.80
1.50
3.80
1.50
Min
66 MHz
Bus Signal Timing
10.50
10.00
12.30
10.50
Max
6.00
8.00
6.00
8.00
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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