A80386DX33 Intel, A80386DX33 Datasheet - Page 116

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A80386DX33

Manufacturer Part Number
A80386DX33
Description
IC MPU 32-BIT 5V 33MHZ 132-PGA
Manufacturer
Intel
Datasheet

Specifications of A80386DX33

Processor Type
386DX
Features
32-bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-PGA
Family Name
Intel386 DX
Device Core Size
32b
Frequency (max)
33MHz
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
132
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
807129

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A80386DX33
Manufacturer:
INTEL
Quantity:
569
Intel386
6 2 3 5 ENCODING OF OPERATION DIRECTION
In many two-operand instructions the d field is pres-
ent to indicate which operand is considered the
source and which is the destination
6 2 3 6 ENCODING OF SIGN-EXTEND (s) FIELD
The s field occurs primarily to instructions with im-
mediate data fields The s field has an effect only if
the size of the immediate data is 8 bits and is being
placed in a 16-bit or 32-bit destination
6 2 3 7 ENCODING OF CONDITIONAL TEST
For the conditional instructions (conditional jumps
and set on condition) tttn is encoded with n indicat-
ing to use the condition (n
and ttt giving the condition to test
116
s
0 None
1 Sign-Extend Data8 to Fill
d
0
1
16-Bit or 32-Bit Destination
Register Memory
‘‘reg’’ Field Indicates Source Operand
‘‘mod r m’’ or ‘‘mod ss index base’’ Indicates
Destination Operand
Register
‘‘reg’’ Field Indicates Destination Operand
‘‘mod r m’’ or ‘‘mod ss index base’’ Indicates
Source Operand
Immediate Data8
(d) FIELD
(tttn) FIELD
TM
Effect on
DX MICROPROCESSOR
k
Direction of Operation
- - Register Memory
k
e
- - Register
0) or its negation (n
Immediate Data 16
Effect on
None
None
e
l
32
1)
6 2 3 8 ENCODING OF CONTROL OR DEBUG
For the loading and storing of the Control Debug
and Test registers
Mnemonic
O
NO
B NAE
NB AE
E Z
NE NZ
BE NA
NBE A
S
NS
P PE
NP PO
L NGE
NL GE
LE NG
NLE G
Do not use any other encoding
Do not use any other encoding
Do not use any other encoding
When Interpreted as Control Register Field
When Interpreted as Debug Register Field
When Interpreted as Test Register Field
OR TEST REGISTER (eee) FIELD
eee Code
eee Code
eee Code
000
010
011
000
001
010
011
110
111
110
111
Overflow
No Overflow
Below Not Above or Equal
Not Below Above or Equal
Equal Zero
Not Equal Not Zero
Below or Equal Not Above
Not Below or Equal Above
Sign
Not Sign
Parity Parity Even
Not Parity Parity Odd
Less Than Not Greater or Equal
Not Less Than Greater or Equal
Less Than or Equal Greater Than 1110
Not Less or Equal Greater Than
Condition
Reg Name
Reg Name
Reg Name
CR0
CR2
CR3
DR0
DR1
DR2
DR3
DR6
DR7
TR6
TR7
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1111
tttn

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