NQ80331M667SL7NM Intel, NQ80331M667SL7NM Datasheet - Page 28

• Manufacturer Part Number: NQ80331M667SL7NM
• Description: IC I/O PROCESSOR 733MHZ 829-BGA
• Manufacturer: Intel

Specifications of NQ80331M667SL7NM

• Rohs Status: RoHS non-compliant
• Processor Type: I/O
• Features: XScale Core
• Speed: 733MHz
• Voltage: 1.35V
• Mounting Type: Surface Mount
• Package / Case: 829-BGA
• Other names: 862506

Intel® 80331 I/O Processor Datasheet
Package Information
Table 12.
28
Reset Strap Signals (Sheet 2 of 2)
P_32BITPCI#
PCIODT_EN
BRG_EN
ARB_EN
Name
Total
Count
11
1
1
1
1
Config
Config
Config
Type
C
November 2004
Bridge Enable: BRG_EN latched at rising (deasserting) edge of
P_RST# and determines if 80331 operates with PCI-to-PCI Bridge.
0 = Disable Bridge, enable P_CLK input on S_CLKIN input.
1 = Enabled Bridge. (Default mode)
NOTE: Muxed onto signal AD[0], see
Internal Arbiter Enable: ARB_EN is latched on the rising
(deasserting) edge of P_RST# and it determines if the PCI interface
will enable the integrated arbiter, or use an external arbiter.
NOTE: ARB_EN only valid when PCI bridge disabled (BRG_EN=0).
0 = Internal Arbiter disabled (Requires pull-down resistor).
1 = Internal Arbiter enabled (Default mode).
NOTE: Muxed onto signal AD[1], see
Primary PCI-X Bus Width: P_32BITPCI# is latched on the rising
(deasserting) edge of P_RST#, and by default, identifies 80331
subsystem as 64-bit unless the appropriate pull-down resistor is
used. This strap sets bit 16 in the PCI-X Bridge status register.
0 = 32 bit wide bus. (Requires pull-down resistor).
1 = 64 bit wide bus. (Default mode).
NOTE: Muxed onto signal A[2], see
PCI Bus ODT Enable: PCIODT_EN is latched on the rising
(deasserting) edge of P_RST#, and determines when the PCI-X
interface will have On Die Termination enabled. PCI ODT enable is
valid for the secondary PCI bus only.
The following signals are affected by PCIODT_EN:
S_AD[63:32], S_C/BE[7:4]#, S_PAR64, S_REQ64#, S_REQ[3:0]#,
S_ACK64#, S_FRAME#, S_IRDY#, S_DEVSEL#, S_TRDY#,
S_STOP#, S_PERR#, S_LOCK#, S_M66EN, S_SERR#,
S_INT[D:A]#
0 = ODT disabled on the secondary PCI bus. (Requires pull-down
1 = ODT enabled on the secondary PCI bus. (Default mode).
NOTE: Muxed onto signal A[20], see
(Requires pull-down resistor)
resistor).
for Functional Modes” on page
for Functional Modes” on page
Functional Modes” on page
for Functional Modes” on page
Description
Document Number: 273943-002
33.
Table 15, “Pin Multiplexing for
Table 15, “Pin Multiplexing
Table 15, “Pin Multiplexing
Table 15, “Pin Multiplexing
33.
33.
33.