CY7C63923-PVXC Cypress Semiconductor Corp, CY7C63923-PVXC Datasheet - Page 15
![no-image](/images/manufacturer_photos/0/1/179/cypress_semiconductor_corp_sml.jpg)
CY7C63923-PVXC
Manufacturer Part Number
CY7C63923-PVXC
Description
IC USB PERIPHERAL CTRLR 48-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet
1.CY7C63823-PXC.pdf
(68 pages)
Specifications of CY7C63923-PVXC
Controller Type
USB Peripheral Controller
Interface
USB
Voltage - Supply
4 V ~ 5.5 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C63923-PVXC
Manufacturer:
CY
Quantity:
14
Part Number:
CY7C63923-PVXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Document 38-08035 Rev. *E
Two important variables that are used for all functions are
KEY1 and KEY2. These variables are used to help discrim-
inate between valid SSCs and inadvertent SSCs. KEY1 must
always have a value of 3Ah, while KEY2 must have the same
value as the stack pointer when the SROM function begins
execution. This would be the Stack Pointer value when the
SSC opcode is executed, plus three. If either of the keys do
not match the expected values, the M8C will halt (with the
exception of the SWBootReset function). The following code
puts the correct value in KEY1 and KEY2. The code starts with
a halt, to force the program to jump directly into the setup code
and not run into it.
Table 9-2. SROM Function Parameters
The SROM also features Return Codes and Lockouts.
9.4.1
Return codes aid in the determination of success or failure of
a particular function. The return code is stored in KEY1’s
position in the parameter block. The CheckSum and
TableRead functions do not have return codes because
KEY1’s position in the parameter block is used to return other
data.
Table 9-3. SROM Return Codes
Read, write, and erase operations may fail if the target block
is read or write protected. Block protection levels are set
during device programming.
The EraseAll function overwrites data in addition to leaving the
entire user Flash in the erase state. The EraseAll function
loops through the number of Flash macros in the product,
executing the following sequence: erase, bulk program all
zeros, erase. After all the user space in all the Flash macros
Key1 / Counter / Return Code
Key2 / TMP
BlockID
Pointer
Clock
Mode
Delay
PCL
Return Code
halt
SSCOP: mov [KEY1], 3ah
mov X, SP
mov A, X
add A, 3
mov [KEY2], A
00h
01h
02h
03h
Return Codes
Variable Name
Success
Function not allowed due to level of protection
on block.
Software reset without hardware reset.
Fatal error, SROM halted.
Description
SRAM Address
0,FBh
0,FCh
0,FDh
0,FEh
0,F8h
0,F9h
0,FAh
0,FFh
are erased, a second loop erases and then programs each
protection block with zeros.
9.5
9.5.1
The SROM function, SWBootReset, is the function that is
responsible for transitioning the device from a reset state to
running user code. The SWBootReset function is executed
whenever the SROM is entered with an M8C accumulator
value of 00h: the SRAM parameter block is not used as an
input to the function. This will happen, by design, after a
hardware reset, because the M8C's accumulator is reset to
00h or when user code executes the SSC instruction with an
accumulator value of 00h. The SWBootReset function will not
execute when the SSC instruction is executed with a bad key
value and a non-zero function code. An enCoRe II device will
execute the HALT instruction if a bad value is given for either
KEY1 or KEY2.
The SWBootReset function verifies the integrity of the
calibration data by way of a 16-bit checksum, before releasing
the M8C to run user code.
9.5.2
The ReadBlock function is used to read 64 contiguous bytes
from Flash: a block.
The first thing this function does is to check the protection bits
and determine if the desired BLOCKID is readable. If read
protection is turned on, the ReadBlock function will exit setting
the accumulator and KEY2 back to 00h. KEY1 will have a
value of 01h, indicating a read failure. If read protection is not
enabled, the function will read 64 bytes from the Flash using
a ROMX instruction and store the results in SRAM using an
MVI instruction. The first of the 64 bytes will be stored in SRAM
at the address indicated by the value of the POINTER
parameter. When the ReadBlock completes successfully the
accumulator, KEY1 and KEY2 will all have a value of 00h.
Table 9-4. ReadBlock Parameters
9.5.3
The WriteBlock function is used to store data in the Flash. Data
is moved 64 bytes at a time from SRAM to Flash using this
function. The first thing the WriteBlock function does is to
check the protection bits and determine if the desired
BLOCKID is writable. If write protection is turned on, the Write-
Block function will exit setting the accumulator and KEY2 back
to 00h. KEY1 will have a value of 01h, indicating a write failure.
The configuration of the WriteBlock function is straightforward.
The BLOCKID of the Flash block, where the data is stored,
must be determined and stored at SRAM address FAh.
KEY1
KEY2
BLOCKID
POINTER
Name
SROM Function Descriptions
SWBootReset Function
ReadBlock Function
WriteBlock Function
Address
0,FBh
0,F8h
0,F9h
0,FAh
3Ah
executed.
where returned data should be
stored
Stack Pointer value, when SSC is
Flash block number
First of 64 addresses in SRAM
Description
CY7C63310
CY7C638xx
CY7C639xx
Page 15 of 68