CY7C63923-PVXC Cypress Semiconductor Corp, CY7C63923-PVXC Datasheet - Page 17
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CY7C63923-PVXC
Manufacturer Part Number
CY7C63923-PVXC
Description
IC USB PERIPHERAL CTRLR 48-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet
1.CY7C63823-PXC.pdf
(68 pages)
Specifications of CY7C63923-PVXC
Controller Type
USB Peripheral Controller
Interface
USB
Voltage - Supply
4 V ~ 5.5 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C63923-PVXC
Manufacturer:
CY
Quantity:
14
Part Number:
CY7C63923-PVXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Document 38-08035 Rev. *E
destroy all traces of the previous contents. The bulk program
is followed by a second erase that leaves the Flash macro in
a state ready for writing. The erase, program, erase sequence
is then performed on the next lowest Flash macro in the
address space if it exists. Following the erase of the user
space, the protection block for the Flash macro with the
highest address range is erased. Following the erase of the
protection block, zeros are written into every bit of the
protection table. The next lowest Flash macro in the address
space then has its protection block erased and filled with
zeros.
The end result of the EraseAll function is that all user data in
the Flash is destroyed and the Flash is left in an unpro-
grammed state, ready to accept one of the various write
commands. The protection bits for all user data are also reset
to the zero state
The parameter block values that must be set, besides the
keys, are the CLOCK and DELAY values.
Table 9-9. EraseAll Parameters
9.5.7
The TableRead function gives the user access to part-specific
data stored in the Flash during manufacturing. It also returns
a Revision ID for the die (not to be confused with the Silicon
ID).
Table 9-10. Table Read Parameters
The table space for the enCoRe II is simply a 64-byte row
broken up into eight tables of eight bytes. The tables are
numbered zero through seven. All user and hidden blocks in
the CY7C638xx and CY7C639xx parts consist of 64 bytes.
An internal table holds the Silicon ID and returns the Revision
ID. The Silicon ID is returned in SRAM, while the Revision ID
is returned in the CPU_A and CPU_X registers. The Silicon ID
is a value placed in the table by programming the Flash and is
controlled by Cypress Semiconductor Product Engineering.
The Revision ID is hard coded into the SROM. The Revision
ID is discussed in more detail later in this section.
An internal table holds alternate trim values for the device and
returns a one-byte internal revision counter. The internal
revision counter starts out with a value of zero and is incre-
mented each time one of the other revision numbers is not
incremented. It is reset to zero each time one of the other
revision numbers is incremented. The internal revision count
is returned in the CPU_A register. The CPU_X register will
KEY1
KEY2
CLOCK 0,FCh
DELAY
KEY1
KEY2
BLOCKID 0,FAh
Name
Name
TableRead Function
0,F8h
0,F9h
0,FEh
Address
0,F8h
0,F9h
Address
3Ah
Stack Pointer value when SSC is
executed.
Clock divider used to set the write pulse
width.
For a CPU speed of 12 MHz set to 56h
3Ah
Stack Pointer value when SSC is
executed.
Table number to read.
Description
Description
always be set to FFh when trim values are read. The BLOCKID
value, in the parameter block, is used to indicate which table
should be returned to the user. Only the three least significant
bits of the BLOCKID parameter are used by TableRead
function for the CY7C638xx and CY7C639xx. The upper five
bits are ignored. When the function is called, it transfers bytes
from the table to SRAM addresses F8h–FFh.
The M8C’s A and X registers are used by the TableRead
function to return the die’s Revision ID. The Revision ID is a
16-bit value hard coded into the SROM that uniquely identifies
the die’s design.
9.5.8
The Checksum function calculates a 16-bit checksum over a
user specifiable number of blocks, within a single Flash macro
(Bank) starting from block zero. The BLOCKID parameter is
used to pass in the number of blocks to calculate the
checksum over. A BLOCKID value of 1 will calculate the
checksum of only block 0, while a BLOCKID value of 0 will
calculate the checksum of all 256 user blocks. The 16-bit
checksum is returned in KEY1 and KEY2. The parameter
KEY1 holds the lower eight bits of the checksum and the
parameter KEY2 holds the upper eight bits of the checksum.
The checksum algorithm executes the following sequence of
three instructions over the number of blocks times 64 to be
checksummed.
Table 9-11. Checksum Parameters
10.0
The enCoRe II internal oscillator outputs two frequencies, the
Internal 24-MHz Oscillator and the 32-KHz Low-power Oscil-
lator.
The Internal 24-MHz Oscillator is designed such that it may be
trimmed to an output frequency of 24 MHz over temperature
and voltage variation. With the presence of USB traffic, the
Internal 24-MHz Oscillator can be set to precisely tune to USB
timing requirements (24 MHz ± 1.5%). Without USB traffic, the
Internal 24-MHz Oscillator accuracy is 24 MHz ± 5% (between
0°–70°C). No external components are required to achieve
this level of accuracy.
The internal low-speed oscillator of nominally 32 KHz provides
a slow clock source for the enCoRe II in suspend mode, partic-
ularly to generate a periodic wake-up interrupt and also to
provide a clock to sequential logic during power-up and power-
down events when the main clock is stopped. In addition, this
oscillator can also be used as a clocking source for the Interval
Timer clock (ITMRCLK) and Capture Timer clock (TCAPCLK).
The 32-KHz Low-power Oscillator can operate in low-power
mode or can provide a more accurate clock in normal mode.
KEY1
KEY2
BLOCKID
romx
add [KEY1], A
adc [KEY2], 0
Name
Checksum Function
Clocking
0,F8h
0,F9h
0,FAh
Address
3Ah
Stack Pointer value when SSC is
executed.
Number of Flash blocks to calculate
checksum on.
Description
CY7C63310
CY7C638xx
CY7C639xx
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