PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 143

• Manufacturer Part Number: PIC18F8722-I/PT
• Description: 80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8722-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 70
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 3.9K Bytes
• Speed: 40 MHz
• Timers: 2-8 bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 11-5:
 2004 Microchip Technology Inc.
RC0/T1OSO/T13CKI
RC1/T1OSI/
ECCP2/P2A
RC2/ECCP1/P1A
RC3/SCK1/SCL1
RC4/SDI1/SDA1
RC5/SDO1
Legend:
Note 1:
Pin Name
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
I
Default assignment for ECCP2 when CCP2MX configuration bit is set.
2
C/SMB = I
PORTC FUNCTIONS
Function
ECCP2
T1OSO
T13CKI
ECCP1
T1OSI
P2A
SDO1
SCK1
SDA1
2
SCL1
SDI1
RC0
RC1
RC2
RC3
RC4
RC5
P1A
C/SMBus input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
(1)
(1)
Setting
TRIS
0
1
x
1
0
1
x
0
1
0
0
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1
0
1
0
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O Type
I
I
2
2
C/SMB I
C/SMB I
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
Preliminary
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output; enabled when Timer1 oscillator enabled.
Disables digital I/O.
Timer1/Timer3 counter input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input; enabled when Timer1 oscillator enabled.
Disables digital I/O.
ECCP2 compare output and ECCP2 PWM output. Takes priority over
port data.
ECCP2 capture input.
ECCP2 Enhanced PWM output, channel A. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data.
LATC<2> data output.
PORTC<2> data input.
ECCP1 compare output and ECCP1 PWM output. Takes priority over
port data.
ECCP1 capture input.
ECCP1 Enhanced PWM output, channel A. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data.
LATC<3> data output.
PORTC<3> data input.
SPI™ clock output (MSSP1 module). Takes priority over port data.
SPI clock input (MSSP1 module).
I
setting.
LATC<4> data output.
PORTC<4> data input.
SPI data input (MSSP1 module).
I
LATC<5> data output.
PORTC<5> data input.
SPI data output (MSSP1 module). Takes priority over port data.
2
2
2
2
C™ clock output (MSSP1 module). Takes priority over port data.
C clock input (MSSP1 module); input type depends on module
C data output (MSSP1 module). Takes priority over port data.
C data input (MSSP1 module); input type depends on module setting.
PIC18F8722 FAMILY
Description
DS39646B-page 141