PIC18F8722-I/PT Microchip Technology Inc., PIC18F8722-I/PT Datasheet - Page 307

• Manufacturer Part Number: PIC18F8722-I/PT
• Description: 80 PIN, 128 KB FLASH, 4K RAM, 70 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8722-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 70
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 3.9K Bytes
• Speed: 40 MHz
• Timers: 2-8 bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 25-7:
 2004 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
bit 7
CP7: Code Protection bit
1 = Block 7 (01C000-01FFFFh) not code-protected
0 = Block 7 (01C000-01FFFFh) code-protected
CP6: Code Protection bit
1 = Block 6 (01BFFF-018000h) not code-protected
0 = Block 6 (01BFFF-018000h) code-protected
CP5: Code Protection bit
1 = Block 5 (014000-017FFFh) not code-protected
0 = Block 5 (014000-017FFFh) code-protected
CP4: Code Protection bit
1 = Block 4 (010000-013FFFh) not code-protected
0 = Block 4 (010000-013FFFh) code-protected
CP3: Code Protection bit
1 = Block 3 (00C000-00FFFFh) not code-protected
0 = Block 3 (00C000-00FFFFh) code-protected
CP2: Code Protection bit
1 = Block 2 (008000-00BFFFh) not code-protected
0 = Block 2 (008000-00BFFFh) code-protected
CP1: Code Protection bit
1 = Block 1 (004000-007FFFh) not code-protected
0 = Block 1 (004000-007FFFh) code-protected
CP0: Code Protection bit
1 = Block 0 (000800, 001000 or 002000
0 = Block 0 (000800, 001000 or 002000
Legend:
R = Readable bit
-n = Value when device is unprogrammed
CP7
R/C-1
Note 1: Unimplemented in PIC18F6527/6622/6627/8527/8622/8627 devices; maintain this
(1)
2: Unimplemented in PIC18F6527/6622/8527/8622 devices; maintain this bit set.
3: Unimplemented in PIC18F6527/8527 devices; maintain this bit set.
4: Boot Block size is determined by the BBSIZ<1:0> bits in CONFIG4L.
bit set.
CP6
R/C-1
(1)
(1)
(1)
(2)
(2)
(3)
C = Clearable bit
CP5
R/C-1
Preliminary
(2)
CP5
R/C-1
(4)
(4)
PIC18F8722 FAMILY
(2)
-003FFFh) not code-protected
-003FFFh) code-protected
CP3
R/C-1
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
(3)
R/C-1
CP2
R/C-1
CP1
DS39646B-page 305
R/C-1
CP0
bit 0