PIC24FJ256GB206-I/MR Microchip Technology Inc., PIC24FJ256GB206-I/MR Datasheet - Page 253
PIC24FJ256GB206-I/MR
Manufacturer Part Number
PIC24FJ256GB206-I/MR
Description
16-bit, 256KB Flash, 96K RAM, USB, 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ256GB206-IPT.pdf
(386 pages)
Specifications of PIC24FJ256GB206-I/MR
A/d Inputs
16 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
52
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin QFN
Programmable Memory
256K Bytes
Ram Size
98K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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REGISTER 18-6:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-4
bit 3
bit 2
bit 1-0
Note 1:
R-0, HSC
ENDPT3
U-0
—
This bit is only valid for endpoints with available even and odd BD registers.
Unimplemented: Read as ‘0’
ENDPT<3:0>: Number of the Last Endpoint Activity bits
(Represents the number of the BDT updated by the last USB transfer.)
1111 = Endpoint 15
1110 = Endpoint 14
.
.
.
0001 = Endpoint 1
0000 = Endpoint 0
DIR: Last BD Direction Indicator bit
1 = The last transaction was a transmit transfer (TX)
0 = The last transaction was a receive transfer (RX)
PPBI: Ping-Pong BD Pointer Indicator bit
1 = The last transaction was to the odd BD bank
0 = The last transaction was to the even BD bank
Unimplemented: Read as ‘0’
R-0, HSC
ENDPT2
U-0
—
U1STAT: USB STATUS REGISTER
U = Unimplemented bit, read as ‘0’
W = Writable bit
‘1’ = Bit is set
R-0, HSC
ENDPT1
U-0
—
R-0, HSC
PIC24FJ256GB210 FAMILY
ENDPT0
U-0
—
(1)
HSC = Hardware Settable/Clearable bit
‘0’ = Bit is cleared
R-0, HSC
U-0
DIR
—
R-0, HSC
PPBI
U-0
—
(1)
x = Bit is unknown
U-0
U-0
—
—
DS39975A-page 253
U-0
U-0
—
—
bit 8
bit 0
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