PIC24FJ256GB206-I/MR Microchip Technology Inc., PIC24FJ256GB206-I/MR Datasheet - Page 314

• Manufacturer Part Number: PIC24FJ256GB206-I/MR
• Description: 16-bit, 256KB Flash, 96K RAM, USB, 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ256GB206-I/MR

• A/d Inputs: 16 Channel, 10-bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin QFN
• Programmable Memory: 256K Bytes
• Ram Size: 98K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC24FJ256GB210 FAMILY
REGISTER 23-1:
DS39975A-page 314
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-10
bit 9
bit 8
bit 7-6
bit 5
EVPOL1
R/W-0
R/W-0
CEN
CEN: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin
0 = Comparator output is internal only
CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
Unimplemented: Read as ‘0’
CEVT: Comparator Event bit
1 = Comparator event that is defined by EVPOL<1:0> has occurred; subsequent triggers and interrupts
0 = Comparator event has not occurred
COUT: Comparator Output bit
When CPOL = 0:
1 = V
0 = V
When CPOL = 1:
1 = V
0 = V
EVPOL<1:0>: Trigger/Event/Interrupt Polarity Select bits
11 = Trigger/event/interrupt is generated on any change of the comparator output (while CEVT = 0)
10 = Trigger/event/interrupt is generated on transition of the comparator output:
01 = Trigger/event/interrupt is generated on transition of comparator output:
00 = Trigger/event/interrupt generation is disabled
Unimplemented: Read as ‘0’
EVPOL0
R/W-0
R/W-0
COE
are disabled until the bit is cleared
IN
IN
IN
IN
If CPOL = 0 (non-inverted polarity):
High-to-low transition only.
If CPOL = 1 (inverted polarity):
Low-to-high transition only.
If CPOL = 0 (non-inverted polarity):
Low-to-high transition only.
If CPOL = 1 (inverted polarity):
High-to-low transition only.
CMxCON: COMPARATOR x CONTROL REGISTERS
(COMPARATORS 1 THROUGH 3)
+ > V
+ < V
+ < V
+ > V
IN
IN
IN
IN
HS = Hardware Settable bit
W = Writable bit
‘1’ = Bit is set
-
-
-
-
R/W-0
CPOL
U-0
—
R/W-0
CREF
U-0
—
U = Unimplemented bit, read as ‘0’
HSC = Hardware Settable/Clearable bit
‘0’ = Bit is cleared
U-0
U-0
—
—
U-0
U-0
—
—
 2010 Microchip Technology Inc.
x = Bit is unknown
R/W-0, HS
R/W-0
CEVT
CCH1
R-0, HSC
COUT
R/W-0
CCH0
bit 8
bit 0