PIC24FJ256GB206-I/MR Microchip Technology Inc., PIC24FJ256GB206-I/MR Datasheet - Page 83

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PIC24FJ256GB206-I/MR

Manufacturer Part Number
PIC24FJ256GB206-I/MR
Description
16-bit, 256KB Flash, 96K RAM, USB, 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ256GB206-I/MR

A/d Inputs
16 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
52
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin QFN
Programmable Memory
256K Bytes
Ram Size
98K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
EXAMPLE 5-2:
EXAMPLE 5-3:
EXAMPLE 5-4:
 2010 Microchip Technology Inc.
// C example using MPLAB C30
//Set up pointer to the first memory location to be written
; Set up NVMCON for row programming operations
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
; Perform the TBLWT instructions to write the latches
; 0th_program_word
; 1st_program_word
;
; 63rd_program_word
2nd_program_word
unsigned long progAddr = 0xXXXXXX;
unsigned int offset;
TBLPAG = progAddr>>16;
offset = progAddr & 0xFFFF;
__builtin_tblwtl(offset, 0x0000);
NVMCON = 0x4042;
asm("DISI #5");
__builtin_write_NVM();
MOV
MOV
MOV
MOV
MOV
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0]
DISI
MOV.B
MOV
MOV.B
MOV
BSET
NOP
NOP
BTSC
BRA
#0x4001, W0
W0, NVMCON
#0x0000, W0
W0, TBLPAG
#0x6000, W0
#LOW_WORD_0, W2
#HIGH_BYTE_0, W3
#LOW_WORD_1, W2
#HIGH_BYTE_1, W3
#LOW_WORD_2, W2
#HIGH_BYTE_2, W3
#LOW_WORD_63, W2
#HIGH_BYTE_63, W3
#5
#0x55, W0
W0, NVMKEY
W1, NVMKEY
NVMCON, #WR
NVMCON, #15
$-2
#0xAA, W1
ERASING A PROGRAM MEMORY BLOCK (‘C’ LANGUAGE CODE)
LOADING THE WRITE BUFFERS
INITIATING A PROGRAMMING SEQUENCE
PIC24FJ256GB210 FAMILY
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 0x55 key
;
; Write the 0xAA key
; Start the programming sequence
; Required delays
; and wait for it to be
; completed
// Address of row to write
// Initialize PM Page Boundary SFR
// Initialize lower word of address
// Set base address of erase block
// with dummy latch write
// Initialize NVMCON
// Block all interrupts with priority <7
// for next 5 instructions
// check function to perform unlock
// sequence and set WR
;
; Initialize NVMCON
;
; Initialize PM Page Boundary SFR
; An example program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
DS39975A-page 83

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