PIC16F631-I/P Microchip Technology Inc., PIC16F631-I/P Datasheet - Page 85

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PIC16F631-I/P

Manufacturer Part Number
PIC16F631-I/P
Description
MCU, 8-Bit, 1KW Flash, 64 RAM, 18 I/O, PDIP-20
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F631-I/P

Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
18
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
64 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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REGISTER 5-1:
TABLE 5-1:
© 2007 Microchip Technology Inc.
INTCON
OPTION_REG RABPU INTEDG
TMR0
TRISA
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Note 1:
RABPU
R/W-1
Name
Timer0 module.
A dedicated 16-bit WDT postscaler is available. See Section 14.5 “Watchdog Timer (WDT)” for more
information.
RABPU: PORTA/PORTB Pull-up Enable bit
1 = PORTA/PORTB pull-ups are disabled
0 = PORTA/PORTB pull-ups are enabled by individual PORT latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (F
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
Timer0 Module Register
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
Bit 7
INTEDG
GIE
R/W-1
OPTION_REG: OPTION REGISTER
BIT VALUE
PEIE
Bit 6
000
001
010
011
100
101
110
111
W = Writable bit
‘1’ = Bit is set
R/W-1
T0CS
PIC16F631/677/685/687/689/690
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
T0CS
Bit 5
T0IE
TMR0 RATE
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
T0SE
INTE
Bit 4
R/W-1
T0SE
WDT RATE
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
OSC
RABIE
Bit 3
PSA
/4)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
PSA
Bit 2
T0IF
PS2
INTF
Bit 1
PS1
R/W-1
PS2
RABIF 0000 0000 0000 0000
Bit 0
PS0
x = Bit is unknown
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
POR, BOR
Value on
R/W-1
PS1
DS41262D-page 83
Value on
all other
Resets
R/W-1
PS0
bit 0

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