PIC18F4431-I/P Microchip Technology Inc., PIC18F4431-I/P Datasheet - Page 126
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PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4431-IP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
A/d Inputs
9-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC18F2331/2431/4331/4431
10.4
PORTD is an 8-bit wide, bidirectional port. The
corresponding Data Direction register is TRISD.
Setting a TRISD bit (= 1) will make the corresponding
PORTD pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISD
bit (= 0) will make the corresponding PORTD pin an
output (i.e., put the contents of the output latch on the
selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
FIGURE 10-21:
DS39616B-page 124
Note:
Note:
PORT/PWM Select
PWM6,7 Data Out
PORTD, TRISD and LATD
Registers
PORTD is only available on PIC18F4X31
devices.
On a Power-on Reset, these pins are
configured as digital inputs.
RD PORTD
WR TRISD
WR LATD
Data Bus
PORTD
or
BLOCK DIAGRAM OF RD7:RD6 PINS
TRIS Latch
Data Latch
D
D
RD TRISD
CK
CK
RD LATD
Q
Q
Q
Q
Preliminary
0
1
Q
PORTD includes PWM<7:6> complementary fourth
channel PWM outputs. PWM4 is the complementary
output of PWM5 (the third channel), which is multi-
plexed with the RB5 pin. This output can be used as the
alternate output using the PWM4MX configuration bit in
CONFIG3L when the low-voltage programming pin
(PGM) is used on RB5.
RD1, RD2 and RD3 can be used as the alternate out-
put for SDO, SDI/SDA and SCK/SCL using the SSPMX
configuration bit in CONFIG3L.
RD4 an be used as the alternate output for FLTA using
the FLTAMX configuration bit in CONFIG3L.
EXAMPLE 10-4:
CLRF
CLRF
MOVLW
MOVWF
EN
D
PORTD
LATD
0xCF
TRISD
V
V
N
P
SS
DD
Schmitt
Trigger
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
INITIALIZING PORTD
2003 Microchip Technology Inc.
RD[7:6] Pin
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