ICS1893CY-10LF IDT, Integrated Device Technology Inc, ICS1893CY-10LF Datasheet - Page 42

• Manufacturer Part Number: ICS1893CY-10LF
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893CY-10LF

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 1893CY-10LF; 800-1025

6.3 Functional Block: 100Base-X PCS and PMA Sublayers
6.3.1 PCS Sublayer
ICS1893CY-10 Rev 1/07
Note:
The ICS1893CY-10 is fully compliant with clause 24 of the ISO/IEC specification, which defines the
100Base-X Physical Coding sublayer (PCS) and Physical Medium Attachment (PMA) sublayers.
The ICS1893CY-10 100Base-X PCS sublayer provides two interfaces: one to a MAC/repeater and the
other to the ICS1893CY-10 PMA sublayer. An ICS1893CY-10’s PCS sublayer performs the transmit,
receive, and control functions and consists of the following:
•
•
•
Note:
When the STA reads the status bits, the present state of the auto-negotiation process is automatically
latched into the status bits, regardless of how they compare to the value currently in the latch. However,
the read presents the STA with the previously latched values of the status bits, not the values just latched
into the status register by the read. Therefore, the STA must perform two reads of the status bits to
determine the present state of the Auto-Negotiation Arbitration State Machine.
The first read provides a ’history’ of the auto-negotiation process, (that is, the highest state achieved by
the auto-negotiation process). The second read provides the present state of the auto-negotiation
process. This behavior allows management to determine the greatest forward progress made by the
auto-negotiation logic, which is valuable for diagnosing link errors and failures.
PCS Transmit sublayer, which provides the following:
PCS Receive sublayer, which provides the following:
PCS control functions, which provide:
– Parallel-to-serial conversion
– 4B/5B encoding
– Collision detection
– Serial-to-parallel conversion
– 4B/5B encoding
– Carrier detection
– Code group framing
– Assertion of the CRS (carrier sense) signal
– Assertion of the COL (collision detection) signal
ICS1893CY-10 Data Sheet - Release
Once the auto-negotiation process completes successfully, the value of all the Progress Monitor
status bits and the Auto-Negotiation Complete bit have a value of logic one. A read operation of the
QuickPoll Register provides a value of logic one for the Auto-Negotiation Complete bit and an octal
value of 111 for the status bits.
Subsequent reads of the QuickPoll Register also provide a value of logic one for the
Auto-Negotiation Complete bit. However, the value of the status bits are 000b, providing the link
remains established.
When configured for 100M Symbol mode operations, the MAC/Repeater Interface bypasses most
of the PCS. When the ICS1893CY-10 MAC/Repeater Interface is in this mode, most of its PCS
Transmit and Receive modules are inactive. However, its PCS control functions (CRS and COL)
remain operational.
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
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Chapter 6 Functional Blocks