Si5369-EVB Silicon Laboratories Inc, Si5369-EVB Datasheet - Page 29

• Manufacturer Part Number: Si5369-EVB
• Description: MCU, MPU & DSP Development Tools SI5369 DEV KIT
• Manufacturer: Silicon Laboratories Inc

Specifications of Si5369-EVB

• Processor To Be Evaluated: Si5369
• Interface Type: I2C, SPI
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: Details

Reset value = 0010 1100
Register 6.
Name
Type
7:6
5:3
2:0
Bit
Bit
SFOUT4_REG [2:0]
SFOUT3_REG [2:0]
D7
R
Reserved
Name
D6
R
SFOUT4_REG [2:0].
Controls output signal format and disable for CKOUT4 output buffer. The LVPECL
and CMOS output formats draw more current than either LVDS or CML; however,
there are restrictions in the allowed output format pin settings so that the maxi-
mum power dissipation for the TQFP devices is limited when they are operated at
3.3 V. When there are four enabled LVPECL or CMOS outputs, the fifth output
must be disabled. When there are five enabled outputs, there can be no more
than three outputs that are either LVPECL or CMOS.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
SFOUT3_REG [2:0].
Controls output signal format and disable for CKOUT3 output buffer. The LVPECL
and CMOS output formats draw more current than either LVDS or CML; however,
there are restrictions in the allowed output format pin settings so that the maxi-
mum power dissipation for the TQFP devices is limited when they are operated at
3.3 V. When there are four enabled LVPECL or CMOS outputs, the fifth output
must be disabled. When there are five enabled outputs, there can be no more
than three outputs that are either LVPECL or CMOS.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
D5
SFOUT4_REG [2:0]
Preliminary Rev. 0.4
R/W
D4
D3
Function
D2
SFOUT3_REG [2:0]
R/W
D1
D0
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