Si5369-EVB Silicon Laboratories Inc, Si5369-EVB Datasheet - Page 63

MCU, MPU & DSP Development Tools SI5369 DEV KIT

Si5369-EVB

Manufacturer Part Number
Si5369-EVB
Description
MCU, MPU & DSP Development Tools SI5369 DEV KIT
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of Si5369-EVB

Processor To Be Evaluated
Si5369
Interface Type
I2C, SPI
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
 Details
Reset value = 0000 0000
Register 136.
Name
Type
5:0
Bit
Bit
7
6
RST_REG
RST_REG
Reserved
Name
R/W
ICAL
D7
RST_REG.
Internal Reset.
0: Normal operation.
1: Reset of all internal logic. Outputs tristated or disabled during reset.
ICAL.
Start an Internal Calibration Sequence.
For proper operation, the device must go through an internal calibration sequence. ICAL
is a self-clearing bit. Writing a one to this location initiates an ICAL. The calibration is
complete once the LOL alarm goes low. A valid stable clock (within 100 ppm) must be
present to begin ICAL.
Note: Any divider, CLKINn_RATE or BWSEL_REG changes require an ICAL to take effect.
0: Normal operation.
1: Writing a "1" initiates internal self-calibration. Upon completion of internal self-
calibration, ICAL is internally reset to zero.
ICAL
R/W
D6
Changes in SFOUTn_REG, PD_CKn, or DSBLn_REG will cause a random change in skew
until an ICAL is completed.
D5
R
Preliminary Rev. 0.4
D4
R
Function
D3
R
D2
R
D1
R
D0
R
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