Si5369-EVB Silicon Laboratories Inc, Si5369-EVB Datasheet - Page 64

MCU, MPU & DSP Development Tools SI5369 DEV KIT

Si5369-EVB

Manufacturer Part Number
Si5369-EVB
Description
MCU, MPU & DSP Development Tools SI5369 DEV KIT
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of Si5369-EVB

Processor To Be Evaluated
Si5369
Interface Type
I2C, SPI
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
 Details
Reset value = 0000 0000
Reset value = 0000 1111
64
Register 137.
Register 138.
Name
Name
Type
Type
7:1
7:4
Bit
Bit
Bit
Bit
0
3
2
LOS4_EN [1:0]
LOS3_EN [1:0]
D7
FASTLOCK
Reserved
Reserved
D7
Name
Name
D6
Reserved
R
D6
LOS4_EN [1:0].
Note: LOS1_EN is split between two registers.
00: Disable LOS monitoring.
01: Reserved.
10: Enable LOSA monitoring.
11: Enable LOS monitoring.
LOSA is a slower and less sensitive version of LOS. See the Family Reference Man-
ual for details.
LOS3_EN [1:0].
Note: LOS1_EN is split between two registers.
00: Disable LOS monitoring.
01: Reserved.
10: Enable LOSA monitoring.
11: Enable LOS monitoring.
LOSA is a slower and less sensitive version of LOS. See the Family Reference Man-
ual for details.
Do not modify.
This bit must be set to 1 to enable FASTLOCK. This improves initial lock time by
dynamically changing the loop bandwidth.
D5
D4
D5
LOS4_EN[1:1]
Preliminary Rev. 0.4
Reserved
R/W
D3
D4
R
LOS3_EN[1:1]
Function
Function
D3
R/W
D2
D2
LOS2_EN[1:1]
R/W
D1
D1
LOS1_EN [1:1]
FASTLOCK
R/W
D0
R/W
D0

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