Si5369-EVB Silicon Laboratories Inc, Si5369-EVB Datasheet - Page 33

MCU, MPU & DSP Development Tools SI5369 DEV KIT

Si5369-EVB

Manufacturer Part Number
Si5369-EVB
Description
MCU, MPU & DSP Development Tools SI5369 DEV KIT
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of Si5369-EVB

Processor To Be Evaluated
Si5369
Interface Type
I2C, SPI
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
 Details
Reset value = 0000 0000
Register 10.
Name
Type
7:6
Bit
Bit
5
4
3
2
1
0
D7
DSBL5_REG
DSBL4_REG
DSBL3_REG
DSBL2_REG
DSBL1_REG
R
Reserved
Reserved
Name
D6
R
DSBL5_REG
DSBL5_REG.
This bit controls the powerdown and disable of the CKOUT5 output buffer. If disable
mode is selected, the NC5_LS output divider is also powered down.
0: CKOUT5 enabled.
1: CKOUT5 disabled.
DSBL4_REG.
This bit controls the powerdown and disable of the CKOUT4 output buffer. If disable
mode is selected, the NC4 output divider is also powered down.
0'b=CKOUT4 enabled
1'b=CKOUT4 disabled
DSBL3_REG.
This bit controls the powerdown and disable of the CKOUT3 output buffer. If disable
mode is selected, the NC3 output divider is also powered down.
0: CKOUT3 enabled
1: CKOUT3 disabled
DSBL2_REG.
This bit controls the powerdown and disable of the CKOUT2 output buffer. If disable
mode is selected, the NC2 output divider is also powered down.
0: CKOUT2 enabled
1: CKOUT2 disabled
DSBL1_REG.
This bit controls the powerdown and disable of the CKOUT1 output buffer. If disable
mode is selected, the NC1 output divider is also powered down.
0: CKOUT1 enabled
1: CKOUT1 disabled
R/W
D5
Reserved
D4
R
Preliminary Rev. 0.4
DSBL4_REG DSBL3_REG DSBL2_REG DSBL1_REG
R/W
D3
Function
R/W
D2
D1
R
D0
R
33

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