MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 121

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.19.2
4.19.2.1
The TIM16B4C module is internally connected to the PTB (IOC0, IOC1, IOC2) and to the Rx signal as specified in
“General Purpose I/O - PTB[0…2]
4.19.2.2
4.19.2.2.1
This pin serves as input capture or output compare for channel 3 and is internally connected to the Rx signal as specified in
Section 4.18.2, “Alternative SCI / LIN
4.19.2.2.2
This pin serves as an input capture or output compare for channel 2 and can be routed to the PTB2 general purpose I/O.
4.19.2.2.3
This pin serves as an input capture or output compare for channel 1 and can be routed to the PTB1 general purpose I/O.
4.19.2.2.4
This pin serves as an input capture or output compare for channel 0 and can be routed to the PTB0 general purpose I/O.
4.19.3
4.19.3.1
This section provides a detailed description of all memory and registers.
4.19.3.2
The memory map for the TIM16B4C module is given below in
Freescale Semiconductor
Offset
0xCC
0xC0
0xC1
0xC2
0xC3
0xC4
0xC5
0xC6
0xC7
0xC8
0xC9
0xCA
0xCB
(106)
Signal Description
Memory Map and Registers
Overview
Detailed Signal Descriptions
Overview
Module Memory Map
IOC3 – Input Capture and Output Compare Channel 3
Since the Rx signal is only available as an input, using the output compare feature for this
channel would have no effect.
IOC2 – Input Capture and Output Compare Channel 2
IOC1 – Input Capture and Output Compare Channel 1
IOC0 – Input Capture and Output Compare Channel 0
For the description of interrupts see
(IOC3).
Timer Input Capture/Output Compare Select (TIOS)
Functionality.
Output Compare 3 Mask Register (OC3M)
Timer System Control Register 1 (TSCR1)
Timer System Control Register 2 (TSCR2)
Output Compare 3 Data Register (OC3D)
Timer Compare Force Register (CFORC)
Timer Toggle Overflow Register (TTOV)
Timer Interrupt Enable Register (TIE)
Main Timer Interrupt Flag 1 (TFLG1)
Timer Control Register 1 (TCTL1)
Timer Control Register 2 (TCTL2)
Timer Count Register (TCNT(hi))
Timer Count Register (TCNT(lo))
MM912_634 Advance Information, Rev. 4.0
Table 161. Module Memory Map
Section 4.19.6,
Use
NOTE
NOTE
Table
161.
“Interrupts.
Basic Timer Module - TIM (TIM16B4C)
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Section 4.18,
(107)
(108)
(107)
121