MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 152

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.27.3.9
4.27.3.10
4.27.3.11
4.27.3.12
Figure 4.27.4
of the internal resources in the memory map. The whole 256 k global memory space is visible through the P-Flash window located
in the 64 k local memory map located at 0x8000 - 0xBFFF using the PPAGE register.
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Linear voltage regulator with bandgap reference
Low-voltage detect (LVD) with low-voltage interrupt (LVI)
Power-on reset (POR) circuit
Low-voltage reset (LVR)
Non-intrusive memory access commands
Supports in-circuit programming of on-chip nonvolatile memory
Trace buffer with depth of 64 entries
Three comparators (A, B and C)
— Comparator A compares the full address bus and full 16-bit data bus
— Exact address or address range comparisons
Two types of comparator matches
— Tagged: This matches just before a specific instruction begins execution
— Force: This is valid on the first instruction boundary after a match occurs
Four trace modes
Four stage state sequencer
Up to 2.0 Mbyte/s data rate
Configurable 4-bit or 8-bit wide data path
shows MC9S12I64 CPU and BDM local address translation to the global memory map. It indicates also the location
On-Chip Voltage Regulator (VREG)
Background Debug (BDM)
Debugger (DBG)
Die to Die Initiator (D2DI)
MM912_634 Advance Information, Rev. 4.0
MM912_634 - MCU Die Overview
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