DS90C387RVJDX/NOPB National Semiconductor, DS90C387RVJDX/NOPB Datasheet - Page 17

• Manufacturer Part Number: DS90C387RVJDX/NOPB
• Description: IC LDI DUAL PIXAL 3.3V 100-TQFP
• Manufacturer: National Semiconductor

Specifications of DS90C387RVJDX/NOPB

• Applications: Displays
• Interface: 2-Wire Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 100-TQFP, 100-VQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS90C387RVJDX

Two-Wire Serial Communication
Interface for Slave
The master must generate a “ Start ”, by sending the 7-bit
slave address plus a 0 and wait for acknowledge from
DS90C387R. When DS90C387R acknowledges (the 1st
LVDS Interface
Note 15: For a 48-bit dual pixel application - LSB (Less Significant Bit) = R16,G16,B16,R26,G26,B26 and MSB (Most Significant Bit) = R15,G15,B15,R25,G25,B25.
X=G
X=R
X=B
X
Signals Color Bits
TABLE 6. 12-bit (two data per clock) data mapping (DUAL=GND, BAL=Vcc/GND, only A0-A3 are used).
VGA - TFT Data
MSB
MSB
MSB
LSB
LSB
LSB
Y=1
Y=2
24-bit
Y
G0
G1
G2
G3
G4
G5
G6
G7
R0
R1
R2
R3
R4
R5
R6
R7
B0
B1
B2
B3
B4
B5
B6
B7
Transmitter input pin names
(Continued)
Z=0-7
Z
DS90C387R
TABLE 5. LVDS data bit naming convention
E2-D10
E2-D11
E1-D10
E1-D11
E2-D4
E2-D5
E2-D6
E2-D7
E2-D8
E2-D9
E1-D8
E1-D9
E2-D0
E2-D1
E2-D2
E2-D3
E1-D0
E1-D1
E1-D2
E1-D3
E1-D4
E1-D5
E1-D6
E1-D7
LVDS bit number (not VGA controller LSB to MSB)
17
Receiver output pin names
ACK) that the master is calling, the master then sends the
data register address byte and waits for acknowledge from
the slave. When the slave acknowledges (the 2nd ACK), the
master sends the data byte and wait for acknowledge from
the slave. When the slave acknowledges (the 3rd ACK), the
master generates a “ Stop ”. This completes the “ WRITE ”.
DS90CF388
Even (Second) Pixel
Odd (First) Pixel
R16
R17
R10
R12
R13
R14
R15
G16
G17
G10
G11
G12
G13
G14
G15
R11
B16
B17
B10
B11
B12
B13
B14
B15
Description
Green
Blue
Red
18-bit
TFT Panel Data
G0
G1
G2
G3
G4
G5
R0
R1
R2
R3
R4
R5
B0
B1
B2
B3
B4
B5
Signals
24-bit
G0
G1
G2
G3
G4
G5
G6
G7
R0
R1
R2
R3
R4
R5
R6
R7
B0
B1
B2
B3
B4
B5
B6
B7
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