HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 16

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
DAC1408D650
Product data sheet
Each DAC device of the system generates its own reference (ref_A in
If configured as a slave, an early-late comparator compares the internal reference with the
external reference provided by the MDS pins. The comparator controls an internal buffer
that is used to delay the samples.
Fig 7.
Multi-Device Synchronization (MDS) implementation
All information provided in this document is subject to legal disclaimers.
SYNC~
LANES
Rev. 4 — 26 November 2010
DIG
ref_A
2, 4 or 8 interpolating DAC with JESD204A
BUFFER
COMP
MGMT
CLK
CK
mds_A_out
mds_A
Q
I
DAC
DAC1408D650
001aal073
MDS_A
Figure
© NXP B.V. 2010. All rights reserved.
7).
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