HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 4

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
6. Pinning information
DAC1408D650
Product data sheet
6.1 Pinning
6.2 Pin description
Table 2.
Symbol
SDO
SDIO
SCLK
V
SCS_N
RESET_N
n.c.
VIRES
GAPOUT
V
V
Fig 2.
DDD(1V8)
DDA(1V8)
DDA(1V8)
Pin configuration
Pin description
index area
V
RESET_N
V
V
V
terminal 1
GAPOUT
DDD(1V8)
DDA(1V8)
DDA(1V8)
DDA(3V3)
AUXBN
SCS_N
AUXBP
VIRES
AGND
AGND
SCLK
SDIO
SDO
All information provided in this document is subject to legal disclaimers.
n.c.
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Rev. 4 — 26 November 2010
Pin
1
2
3
4
5
6
7
8
9
10
11
Type
O
I/O
I
P
I
I
-
I/O
I/O
P
P
[1]
DAC1408D650HN
Transparent top view
Description
SPI data output
SPI data input/output
SPI clock
digital supply voltage 1.8 V
SPI chip select (active LOW)
general reset (active LOW)
not connected
DAC biasing resistor
band gap input/output voltage
analog supply voltage 1.8 V
analog supply voltage 1.8 V
2, 4 or 8 interpolating DAC with JESD204A
DAC1408D650
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
005aaa150
n.c.
V
MDS_N
MDS_P
V
AGND
CLKINN
CLKINP
AGND
V
V
AGND
AUXAN
AUXAP
V
AGND
© NXP B.V. 2010. All rights reserved.
DDD(1V8)
DDA(1V8)
DDA(1V8)
DDA(1V8)
DDA(3V3)
4 of 98