HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 78
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HSDC-JAKIT1W2/DB
Manufacturer Part Number
HSDC-JAKIT1W2/DB
Description
DAC/ADC LATTICE KIT
Manufacturer
NXP Semiconductors
Series
-r
Datasheets
1.ADC1413D125HNC15.pdf
(43 pages)
2.DAC1408D650HNC15.pdf
(98 pages)
3.HSDC-JAKIT1W2DB.pdf
(2 pages)
4.HSDC-JAKIT1W2DB.pdf
(2 pages)
5.HSDC-JAKIT1W2DB.pdf
(3 pages)
Specifications of HSDC-JAKIT1W2/DB
Main Purpose
Interface, ADC/DAC for Lattice ECP3 FPGA
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
ADC1413D, DAC1408D, ECP3 FPGA
Primary Attributes
Loop Back Demo with 2 High Speed Converters
Secondary Attributes
USB Powered
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6898
- ADC1413D125HNC15 PDF datasheet
- DAC1408D650HNC15 PDF datasheet #2
- HSDC-JAKIT1W2DB PDF datasheet #3
- HSDC-JAKIT1W2DB PDF datasheet #4
- HSDC-JAKIT1W2DB PDF datasheet #5
- Current page: 78 of 98
- Download datasheet (3Mb)
Table 143. Page 6 register allocation map
[1]
Address
28 1Ch
29 1Dh
31 1Fh
u = undefined at power-up or after reset.
Register name
LN1_CFG_12
LN1_CFG_13
PAGE_ADDRESS R/W
R/W Bit definition
R
R
b7
-
…continued
b6
-
b5
-
b4
LN1_RES2[7:0]
LN1_FCHK[7:0]
-
b3
-
b2
b1
PAGE[2:0]
b0
00000000 00h
Default
Bin
uuuuuuuu 0xuu
uuuuuuuu 0xuu
[1]
Hex
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