KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 184

• Manufacturer Part Number: KIT_TC1797_SK
• Description: KIT STARTER AUDO FUTURE TC1797
• Manufacturer: Infineon Technologies
• Series: Audo Futurer
• Type: MCUr

Specifications of KIT_TC1797_SK

• Contents: Board, Adapters, Cables, CD, Power Supply
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TC1797
• Other names: KITTC1797SKIN

5.3.11.4 E-Ray Interface Timing
The timings in this section are valid for the strong / sharp and strong / medium settings
of the output drivers, and for both A1 or A2 input pads. The timing parameters are not
subject to production test, but verified by design / characterization.
Table 32
Parameter
TxDA / TxDB Signal Timing at end of frame
Time span from last
BSS to FES without the
influence of quartz
tolerances d10Bit_Tx
TxD data valid, from
f
⇒ TxDA, TxDB,
(dTxAsym)
RxDA / RxDB Signal Timing at end of frame
Time span between last
BSS and FES that is
properly decoded,
without influence of
quartz tolerances
d10Bit_Rx
RxD capture by
RxDA / RxDB ⇒
sampling flip-flop,
(dRxAsym)
1) PLL jitter included.
2) Refers to delays caused by the asymmetries of the output drivers of the digital logic and the GPIO pad drivers.
3) E-Ray TxD output drivers have an asymmetry of rising and falling edges of |
4)Limits of 966.5 ns and 1046 ns correspond to (30%, 70%) ×
input thresholds.
Due to different input thresholds of the TC1797, a correcton of -0.5 ns and +0.1 ns has
been applied.
Data Sheet
sample
Quartz tolerance and PLL jitter are not included.
flip-flop txd_reg
1) 4) 5)
2) 3)
5)
E-Ray Interface Timing (Operating Conditions apply)
f
sample
1)
,
Symbol
t
|t
t
|t
60
63
61
64
-
-
t
t
62
65
| CC –
| CC –
CC 997.75 –
SR 966
Min.
180
Limit Values
Typ. Max.
–
–
–
1002.25 ns
1.5
1046.1
3.0
t
V
F
DDP
-
Electrical Parameters
Unit Notes
ns
ns
ns
t
R
| ≤ 1 ns.
FlexRay standard
, C
Conditions
f
f
C
(TxDA, TXDB)
Asymmetrical
delay of rising
and falling edge
(TxDA, TxDB)
f
f
C
(TxDA, TXDB)
Asymmetrical
delay of rising
and falling edge
(RxDA, RxDB)
L
oscdd
oscdd
oscdd
oscdd
L
L
= 25 pF
= 25 pF
= 25 pF
V1.1, 2009-04
= 40MHz;
= 20MHz;
= 20MHz;
= 40MHz;
TC1797