LH28F160BVE-BTL90 Sharp Electronics, LH28F160BVE-BTL90 Datasheet - Page 15

• Manufacturer Part Number: LH28F160BVE-BTL90
• Manufacturer: Sharp Electronics

Specifications of LH28F160BVE-BTL90

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

SHARP
Reliable
V,,=2.7V-3.6V
high voltage, memory contents are protected against
word/byte
V,&V,,,,,
to “1”. Successful word/byte write for boot blocks requires
that the corresponding if set, that WP#=V,,
If word/byte
corresponding WP#=V,,
be set to
V,,<RP#<V,,
attempted.
4.6 Word/Byte Write Command
Word/byte
alternate 1OH) is written, followed by a second write that
specifies the address and data (latched on the rising edge
of WE#). The WSM then takes over, controlling
word/byte
After the word/byte write sequence is written, the device
automatically outputs status register data when read (see
Figure 6). The CPU can detect the completion of the
word/byte
status register bit SR.7.
When word/byte write is complete, status register bit SR.4
should be checked. If word/byte write error is detected, the
status register should be cleared. The internal WSM verify
only detects errors for “1”s that do not successfully write
to “0”s. The CUI remains in read status register mode until
it receives another command.
sequence. Word/byte
word/byte
write event by analyzing the RYlBY#
writes. If word/byte
write and write verify algorithms internally.
write is executed by a two-cycle
status register bits SR.3 and SR.4 will be set
write is attempted to boot block when the
“1”.
produce spurious results and should not be
and VPP=VPPHt12. In the absence of this
Word/byte
writes
write
or RP#=V,,,
setup (standard
can
write is attempted while
write
only
SR. 1 and SR.4 will
operations
or Rp#=V,,.
occur
command
40H
pin or
when
with
the
LHF16V09
or
RP# must also remain at Vt, or V,,
cannot resume until word/byte
during block erase suspend have completed.
The only other valid commands while block erase is
suspended are Read Status Register and Block
Resume. After a Block Erase Resume command is written
to the flash memory, the WSM will continue the block
erase process. Status register bits SR.6 and SR.7 will
automatically clear and RY/BY# will return to VOL. After
the Erase Resume command is written,
automatically outputs status register data when read (see
Figure 7). V,,
level used for block erase) while block erase is suspended.
used for block erase). WP## must also remain at Vt, or V,,
(the same WP# level used for block erase). Block erase
4.7 Block Erase Suspend Command
The Block Erase Suspend command allows block-erase
interruption
block of memory. Once the block-erase process starts.
writing
the WSM
predetermined point in the algorithm. The device outputs
status register data when read after the Block
Suspend command is written. Polling status register bits
SR.7 and SR.6 can determine when the block erase
operation has been suspended (both will be set to “1”).
RY/BY#
twHRZ2 defines the block erase suspend latency.
At this point, a Read Array command can be written to
read data from blocks other than that which is suspended.
A Word/Byte Write command sequence can also be issued
during erase suspend to program data in other blocks.
Using
Section 4.8), a word/byte
suspended. During a word/byte write operation with block
erase suspended, status register bit SR.7 will return to “0”
and the RY/BY# output will transition to VOL. However,
SR.6 will
status.
the Word/Byte
the Block Erase Suspend command requests that
will
remain “1” to indicate block erase suspend
to read or word/byte
suspend the block
also transition to High Z. Specification
must remain at V,,,,,
Write
write operation can also be
write operations initiated
Suspend command (see
erase sequence at a
write data in another
(the same RP# level
(the same V,,
the device
Rev. 1.1
Erase
Erase
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