LH28F160BVE-BTL90 Sharp Electronics, LH28F160BVE-BTL90 Datasheet - Page 6

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LH28F160BVE-BTL90

Manufacturer Part Number
LH28F160BVE-BTL90
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F160BVE-BTL90

Cell Type
NOR
Density
16Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
0C to 70C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

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The access time is 90ns (tAvQV)
range of 2.7V-3.6V.
The boot blocks can be locked for the WP# pin. Block
erase or word/byte write for boot block must not be carried
out by WP# to Low and RP# to VI,.
The status register indicates when the WSM’s
or word/byte write operation is finished.
The RY/BY# output gives an additional indicator of WSM
activity by providing
(versus software polling)
masking for background
polling using RY/BY# minimizes
system power consumption.
that the WSM is performing
write. RY/BY#-high
a new command, block erase is suspended (and word/byte
write is inactive),
device is in deep power-down
temperature range (O’C to +70”(J) and V,,
word/byte
Z indicates that the WSM is ready for
both a hardware
block erase, for example). Status
and status masking
When low, RY/BY# indicates
mode.
a block erase or word/byte
write is suspended, or the
both CPU overhead and
over the operating
signal of status
supply voltage
block erase
(interrupt
LHFl6VO9
The Automatic
reduces active current when the device is in static mode
current is 3mA at 2.7V-3.6V
When CE# and RP# pins are at V,,,
deep power-down
power consumption
reset. A reset time (tpHQv) is required from RP# switching
high until outputs are valid. Likewise,
wake time (tpHEL) from RP#-high until writes to the CUI
are recognized.
the status register is cleared.
The device is available
Outline Package, 1.2 mm thick). Pinout is shown in Figure
2.
(addresses not switching).
standby mode is enabled. When the RP# pin is at GND,
Power Savings (APS) feature substantially
With RP# at GND, the WSM is reset and
mode is enabled
and provides write protection
in 4%lead
In APS mode, the typical I,,,
V,,.
TSOP (Thin
which
the device has a
the I,,
minimizes
Rev. 1.1
CMOS
during
Small
4

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