CY7C0430BV-133BGC Cypress Semiconductor Corp, CY7C0430BV-133BGC Datasheet - Page 10

• Manufacturer Part Number: CY7C0430BV-133BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C0430BV-133BGC

• Density: 1.125Mb
• Access Time (max): 4.7ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 16b
• Package Type: BGA
• Operating Temp Range: 0C to 70C
• Number Of Ports: 4
• Supply Current: 750mA
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 272
• Word Size: 18b
• Number Of Words: 64K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-06027 Rev. *A
Switching Characteristics
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
11. If data is simultaneously written and read to the same address location and t
12. f
13. This parameter is guaranteed by design, but it is not production tested.
14. Valid for both address and data outputs.
MAX2
CYC2
CH2
CL2
R
F
SA
HA
SC
HC
SW
HW
SD
HD
SB
HB
SCLD
HCLD
SCINC
HCINC
SCRST
HCRST
SCRD
HCRD
SMLD
HMLD
SMRD
HMRD
OE
OLZ
OHZ
CD2
CA2
CM2
DC
CKHZ
CKLZ
Parameter
[13]
remaining in the address is undefined.
[13]
MAX2
[14]
[12]
[12]
[14]
for commercial is 135 MHz. t
Maximum Frequency
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Clock Rise Time
Clock Fall Time
Address Set-up Time
Address Hold Time
Chip Enable Set-up Time
Chip Enable Hold Time
R/W Set-up Time
R/W Hold Time
Input Data Set-up Time
Input Data Hold Time
Byte Set-up Time
Byte Hold Time
CNTLD Set-up Time
CNTLD Hold Time
CNTINC Set-up Time
CNTINC Hold Time
CNTRST Set-up Time
CNTRST Hold Time
CNTRD Set-up Time
CNTRD Hold Time
MKLD Set-up Time
MKLD Hold Time
MKRD Set-up Time
MKRD Hold Time
Output Enable to Data Valid
OE to Low-Z
OE to High-Z
Clock to Data Valid
Clock to Counter Address Readback Valid
Clock to Mask Register Readback Valid
Data Output Hold After Clock HIGH
Clock HIGH to Output High-Z
Clock HIGH to Output Low-Z
CYC2
Over the Industrial Operating Range
Min. for commercial is 7.4 ns.
Description
CCS
is violated, the data read from the address, as well as the subsequent data
[11]
Min.
7.5
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
2.3
0.7
3
3
1
1
1
1
1
-133
Max.
CY7C04312BV
133
6.5
4.2
4.7
4.7
4.8
2
2
6
Min.
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
10
4
4
1
3
3
3
3
3
3
3
3
3
3
3
1
1
1
1
CY7C04312BV
CY7C04314BV
-100
CY7C0430BV
Max.
100
6.8
3
3
8
7
5
5
5
Page 10 of 37
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[+] Feedback