CYNSE70064A-50BGC Cypress Semiconductor Corp, CYNSE70064A-50BGC Datasheet - Page 47

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CYNSE70064A-50BGC

Manufacturer Part Number
CYNSE70064A-50BGC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYNSE70064A-50BGC

Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
BGA
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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Part Number:
CYNSE70064A-50BGC
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Quantity:
726
10.9
Figure 10-27 shows the timing diagram for a Search command in the 136-bit-configured table (CFG = 01010101) consisting of a
single device for one set of parameters: TLSZ = 00, HLAT = 001, LRAM = 1, and LDEV = 1. The hardware diagram for this Search
subsystem is shown in Figure 10-28.
The following is the operation sequence for a single 136-bit Search command (also refer to “Command and Command Param-
eters,” Subsection 10.2 on page 19).
Document #: 38-02041 Rev. *F
CFG = 01010101, HLAT = 001, TLSZ = 00, LRAM = 1, LDEV = 1.
• Cycle A: The host ASIC drives the CMDV HIGH and applies Search command code (10) to CMD[1:0] signals. CMD[5:3]
• Cycle B: The host ASIC continues to drive the CMDV HIGH and applies the command code of Search command (10) on
signals must be driven with the index to the GMR pair for use in this Search operation. CMD[8:7] signals must be driven with
the same bits that will be driven on SADR[21:20] by this device if it has a hit. DQ[67:0] must be driven with the 68-bit data
([135:68]) to be compared against all even locations. The CMD[2] signal must be driven to logic 0.
CMD[1:0]. CMD[5:2] must be driven by the index of the comparand register pair for storing the 136-bit word presented on the
DQ bus during cycles A and B. CMD[8:6] signals must be driven with the index of the SSR that will be used for storing the
address of the matching entry and hit flag (see page 14 for the description of SSR[0:7]). The DQ[67:0] is driven with 68-bit
data ([67:0]), compared to all odd locations.
136-bit Search on Tables Configured as ×136 Using a Single CYNSE70064A Device
DQ[67:0]
CMDV, CMD[8:0]
SADR[21:0]
SSF, SSV
CMD[1:0]
CMD[8:2]
PHS_L
CMDV
ALE_L
WE_L
OE_L
CLK2X
CE_L
SSV
SSF
DQ
Figure 10-28. Hardware Diagram for a Table with One Device
Figure 10-27. Timing Diagram for 136-bit Search (One Device)
BHI[2:0]
BHO[2:0]
1
1
1
0
0
0
cycle
Search1
A B A B A B A B
A B A B A B A B
1
01
D1
cycle
Search2
LHO[1]
2
01
D2
cycle
Search3
3
CYNSE70064A
01
D3
cycle
Search4
4
01
D4
6
cycle
5
A1
0
1
0
0
5
cycle
Search1
6
Hit
4
1
1
1
1
1
0
LHI
cycle
Search2
3
7
Miss
A3
0
0
0
1
0
2
Search3
cycle
Hit
8
1
1
Search4
cycle
LHO[0]
Miss
9
1
1
1
0
0
0
cycle
10
0
SRAM
CYNSE70064A
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