M50LPW040K1 Micron Technology Inc, M50LPW040K1 Datasheet - Page 30

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M50LPW040K1

Manufacturer Part Number
M50LPW040K1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M50LPW040K1

Cell Type
NOR
Density
4Mb
Access Time (max)
11/50ns
Interface Type
Parallel/Serial
Boot Type
Top
Address Bus
4/11Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
PLCC
Sync/async
Async/Sync
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
512K
Supply Current
20mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M50LPW040K1
Manufacturer:
ST
Quantity:
20 000
M50LPW040
Figure 17. Chip Erase Flowchart and Pseudo Code (A/A Mux Interface Only)
Note: 1. If an error is found, the Status Register must be cleared before further Program/Erase Controller operations.
30/36
Read Status
b4, b5 = 0
Write 80h
Write 10h
Register
b7 = 1
b3 = 0
b5 = 0
Start
End
YES
YES
YES
YES
NO
NO
NO
NO
Sequence Error (1)
Erase Error (1)
V PP Invalid
Command
Error (1)
Chip Erase command:
– write 80h
– write 10h
do:
– read Status Register
while b7 = 1
If b3 = 1, V PP invalid error:
– error handler
If b4, b5 = 1, Command sequence error:
– error handler
If b5 = 1, Erase error:
– error handler
(memory enters read Status Register after
the Chip Erase command)
AI04195

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