M50LPW040K1 Micron Technology Inc, M50LPW040K1 Datasheet - Page 9

• Manufacturer Part Number: M50LPW040K1
• Manufacturer: Micron Technology Inc

Specifications of M50LPW040K1

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 11/50ns
• Interface Type: Parallel/Serial
• Boot Type: Top
• Address Bus: 4/11Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: PLCC
• Sync/async: Async/Sync
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 512K
• Supply Current: 20mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Compliant

Table 7. LPC Bus Write Field Definitions
Figure 6. LPC Bus Write Waveforms
Number
Clock
Cycle
11-12
3-10
13
14
15
16
17
1
2
CLK
LFRAME
LAD0-LAD3
Number of
clock cycles
Count
Clock
Cycle
1
1
8
2
1
1
1
1
1
CYCTY
START
ADDR
SYNC
Field
DATA
PE +
TAR
TAR
TAR
TAR
DIR
START
LAD0-
011Xb
0000b
XXXX
XXXX
1111b
1111b
0000b
1111b
1111b
LAD3
(float)
(float)
1
CYCTYPE
+ DIR
Memory
1
N/A
I/O
O
O
O
I
I
I
I
I
ADDR
8
On the rising edge of CLK with LFRAME Low, the contents
of LAD0-LAD3 must be 0000b to indicate the start of a LPC
cycle.
Indicates the type of cycle. Bits 3:2 must be 01b. Bit 1
indicates the direction of transfer: 1b for write. Bit 0 is don’t
care (X).
A 32-bit address phase is transferred starting with the most
significant nibble first. A23-A31 must be set to 1. A22 = 1 for
Array, A22 = 0 for registers access. For A19-A21 values,
refer to Table 2.
Data transfer is two cycles, starting with the least significant
nibble.
The host drives LAD0-LAD3 to 1111b to indicate a
turnaround cycle.
The LPC Flash Memory takes control of LAD0-LAD3 during
this cycle.
The LPC Flash Memory drives LAD0-LAD3 to 0000b,
indicating it has received data or a command.
The LPC Flash Memory drives LAD0-LAD3 to 1111b,
indicating a turnaround cycle.
The LPC Flash Memory floats its outputs and the host takes
control of LAD0-LAD3.
DATA
2
TAR
2
Description
SYNC
1
TAR
2
M50LPW040
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