AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 156
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AT91SAM7X128
Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet
1.AT91SAM7X512-AU-999.pdf
(687 pages)
Specifications of AT91SAM7X128
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3
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23.7.2
23.7.2.1
156
AT91SAM7X512/256/128 Preliminary
Interrupt Latencies
External Interrupt Edge Triggered Source
Global interrupt latencies depend on several parameters, including:
This section addresses only the hardware resynchronizations. It gives details of the latency
times between the event on an external interrupt leading in a valid interrupt (edge or level) or the
assertion of an internal interrupt source and the assertion of the nIRQ or nFIQ line on the pro-
cessor. The resynchronization time depends on the programming of the interrupt source and on
its type (internal or external). For the standard interrupt, resynchronization times are given
assuming there is no higher priority in progress.
The PIO Controller multiplexing has no effect on the interrupt latencies of the external interrupt
sources.
Figure 23-6.
• The time the software masks the interrupts.
• Occurrence, either at the processor level or at the AIC level.
• The execution time of the instruction in progress when the interrupt occurs.
• The treatment of higher priority interrupts and the resynchronization of the hardware signals.
External Interrupt Edge Triggered Source
(Negative Edge)
(Positive Edge)
IRQ or FIQ
IRQ or FIQ
nIRQ
MCK
nFIQ
Maximum IRQ Latency = 4 Cycles
Maximum FIQ Latency = 4 Cycles
6120H–ATARM–17-Feb-09
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