AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 40
AT91SAM7X128
Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet
1.AT91SAM7X512-AU-999.pdf
(687 pages)
Specifications of AT91SAM7X128
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3
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11.2
11.2.1
11.2.2
11.2.3
11.2.4
40
ARM7TDMI Processor
AT91SAM7X512/256/128 Preliminary
Instruction Type
Data Type
ARM7TDMI Operating Mode
ARM7TDMI Registers
For further details on ARM7TDMI, refer to the following ARM documents:
ARM Architecture Reference Manual (DDI 0100E)
ARM7TDMI Technical Reference Manual (DDI 0210B)
Instructions are either 32 bits long (in ARM state) or 16 bits long (in THUMB state).
ARM7TDMI supports byte (8-bit), half-word (16-bit) and word (32-bit) data types. Words must be
aligned to four-byte boundaries and half words to two-byte boundaries.
Unaligned data access behavior depends on which instruction is used where.
The ARM7TDMI, based on ARM architecture v4T, supports seven processor modes:
Mode changes may be made under software control, or may be brought about by external inter-
rupts or exception processing. Most application programs execute in User mode. The non-user
modes, or privileged modes, are entered in order to service interrupts or exceptions, or to
access protected resources.
The ARM7TDMI processor has a total of 37registers:
These registers are not accessible at the same time. The processor state and operating mode
determine which registers are available to the programmer.
At any one time 16 registers are visible to the user. The remainder are synonyms used to speed
up exception processing.
Register 15 is the Program Counter (PC) and can be used in all instructions to reference data
relative to the current instruction.
R14 holds the return address after a subroutine call.
R13 is used (by software convention) as a stack pointer.
• 31 general-purpose 32-bit registers
• 6 status registers
User: The normal ARM program execution state
FIQ: Designed to support high-speed data transfer or channel process
IRQ: Used for general-purpose interrupt handling
Supervisor: Protected mode for the operating system
Abort mode: Implements virtual memory and/or memory protection
System: A privileged user mode for the operating system
Undefined: Supports software emulation of hardware coprocessors
6120H–ATARM–17-Feb-09
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