AT91SAM7X128 Atmel, AT91SAM7X128 Datasheet - Page 35
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AT91SAM7X128
Manufacturer Part Number
AT91SAM7X128
Description
MCU 32-Bit 91S ARM7TDMI RISC 128KB Flash 1.8V/3.3V 100-Pin LQFP
Manufacturer
Atmel
Datasheet
1.AT91SAM7X512-AU-999.pdf
(687 pages)
Specifications of AT91SAM7X128
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Ram Size
32 KB
Program Memory Size
128 KB
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Program Memory Type
Flash
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/I2S/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3
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10.6
10.7
10.8
6120H–ATARM–17-Feb-09
Ethernet MAC
Serial Peripheral Interface
Two-wire Interface
• DMA Master on Receive and Transmit Channels
• Compatible with IEEE Standard 802.3
• 10 and 100 Mbit/s operation
• Full- and half-duplex operation
• Statistics Counter Registers
• MII/RMII interface to the physical layer
• Interrupt generation to signal receive and transmit completion
• 28-byte transmit FIFO and 28-byte receive FIFO
• Automatic pad and CRC generation on transmitted frames
• Automatic discard of frames received with errors
• Address checking logic supports up to four specific 48-bit addresses
• Support Promiscuous Mode where all valid received frames are copied to memory
• Hash matching of unicast and multicast destination addresses
• Physical layer management through MDIO interface
• Half-duplex flow control by forcing collisions on incoming frames
• Full-duplex flow control with recognition of incoming pause frames
• Support for 802.1Q VLAN tagging with recognition of incoming VLAN and priority tagged
• Multiple buffers per receive and transmit frame
• Jumbo frames up to 10240 bytes supported
• Supports communication with external serial devices
• Master or slave serial peripheral bus interface
• Master Mode only
• Compatibility with I
frames
– Four chip selects with external decoder allow communication with up to 15
– Serial memories, such as DataFlash
– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
– External co-processors
– 8- to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays per chip select, between consecutive transfers and
– Programmable delay between consecutive transfers
– Selectable mode fault detection
– Maximum frequency at up to Master Clock
peripherals
Sensors
between clock and data
2
C compatible devices (refer to the TWI section of the datasheet)
AT91SAM7X512/256/128 Preliminary
®
and 3-wire EEPROMs
35
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