IDT82P2821BHG IDT, Integrated Device Technology Inc, IDT82P2821BHG Datasheet - Page 130
IDT82P2821BHG
Manufacturer Part Number
IDT82P2821BHG
Description
IC LINE INTERFACE UNIT 640-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82P2821BHG.pdf
(151 pages)
Specifications of IDT82P2821BHG
Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
1
Voltage - Supply
1.8V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
*
Includes
Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Power (watts)
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
800-1703
82P2821BHG
82P2821BHG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT82P2821BHG
Manufacturer:
IDT
Quantity:
170
Company:
Part Number:
IDT82P2821BHG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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8.10 TRANSMITTER AND RECEIVER TIMING CHARACTERISTICS
Physical And Electrical Specifications
IDT82P2821
Transmit Path
Receive Path
Note:
1. Relative to nominal frequency, MCLK = +100 or -100 ppm.
2. RCLK duty cycle width will vary depending on extent of the received pulse jitter displacement. Maximum and minimum RCLK duty cycles are for worst case jitter conditions (0.2 UI
displacement for E1 per ITU G.823).
3. For all digital outputs. C
Symbol
t1
t2
t4
t5
t6
t7
t8
load
MCLK Frequency:
MCLK Tolerance
MCLK Duty Cycle
TCLK Frequency:
TCLK Tolerance
TCLK Duty Cycle
Transmit Data Setup Time
Transmit Data Hold Time
Delay Time of OE low to Driver High-Z
Delay Time of TCLK low to Driver High-Z
Clock Recovery Capture Range
RCLK Duty Cycle
RCLK Pulse Width
RCLK Pulse Width Low Time:
RCLK Pulse Width High Time:
Rise/Fall Time
Receive Data Setup Time:
Receive Data Hold Time:
E1
T1/J1
E1
T1/J1
E1
T1/J1
E1
T1/J1
E1
T1/J1
E1
T1/J1
E1
T1/J1
E1
T1/J1
= 15 pF.
3
2
2
:
Parameter
1
:
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
130
-100
Min
457
607
203
259
203
259
200
200
200
200
-50
30
10
40
40
40
20
+180 / -180
(n = 1 ~ 8)
2.048 X n
1.544 X n
+80 / -80
2.048
1.544
Typ.
TBD
488
648
244
324
244
324
244
324
244
324
50
Max
100
+50
519
689
285
389
285
389
70
90
60
1
February 6, 2009
Unit
MHz
MHz
ppm
MHz
MHz
ppm
ppm
ppm
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
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