IDT82P2821BHG IDT, Integrated Device Technology Inc, IDT82P2821BHG Datasheet - Page 5

• Manufacturer Part Number: IDT82P2821BHG
• Description: IC LINE INTERFACE UNIT 640-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2821BHG

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 800-1703; 82P2821BHG

5 PROGRAMMING INFORMATION ................................................................................................................................... 74
6 JTAG ............................................................................................................................................................................. 118
7 THERMAL MANAGEMENT .......................................................................................................................................... 120
8 PHYSICAL AND ELECTRICAL SPECIFICATIONS ..................................................................................................... 121
Table of Contents
IDT82P2821
4.2 MICROPROCESSOR INTERFACE ......................................................................................................................... 70
4.3 POWER UP .............................................................................................................................................................. 71
4.4 HITLESS PROTECTION SWITCHING (HPS) SUMMARY ...................................................................................... 71
5.1 REGISTER MAP ...................................................................................................................................................... 74
5.2 REGISTER DESCRIPTION ..................................................................................................................................... 78
6.1 JTAG INSTRUCTION REGISTER (IR) .................................................................................................................. 118
6.2 JTAG DATA REGISTER ........................................................................................................................................ 118
6.3 TEST ACCESS PORT (TAP) CONTROLLER ....................................................................................................... 118
7.1 JUNCTION TEMPERATURE ................................................................................................................................. 120
7.2 EXAMPLE OF JUNCTION TEMPERATURE CALCULATION ............................................................................... 120
7.3 HEATSINK EVALUATION ..................................................................................................................................... 120
8.1 ABSOLUTE MAXIMUM RATINGS ......................................................................................................................... 121
8.2 RECOMMENDED OPERATING CONDITIONS .................................................................................................... 122
8.3 DEVICE POWER CONSUMPTION AND DISSIPATION (TYPICAL) 1 ................................................................. 123
8.4 DEVICE POWER CONSUMPTION AND DISSIPATION (MAXIMUM) 1 ............................................................... 124
8.5 D.C. CHARACTERISTICS ..................................................................................................................................... 125
8.6 E1 RECEIVER ELECTRICAL CHARACTERISTICS ............................................................................................. 126
8.7 T1/J1 RECEIVER ELECTRICAL CHARACTERISTICS ......................................................................................... 127
8.8 E1 TRANSMITTER ELECTRICAL CHARACTERISTICS ...................................................................................... 128
8.9 T1/J1 TRANSMITTER ELECTRICAL CHARACTERISTICS ................................................................................. 129
8.10 TRANSMITTER AND RECEIVER TIMING CHARACTERISTICS ......................................................................... 130
8.11 CLKE1 TIMING CHARACTERISTICS ................................................................................................................... 132
8.12 JITTER ATTENUATION CHARACTERISTICS ...................................................................................................... 133
8.13 MICROPROCESSOR INTERFACE TIMING ......................................................................................................... 136
4.1.4
5.1.1
5.1.2
5.2.1
5.2.2
6.2.1
6.2.2
6.2.3
8.13.1 Serial Microprocessor Interface ................................................................................................................ 136
8.13.2 Parallel Motorola Non-Multiplexed Microprocessor Interface ................................................................... 138
8.13.3 Parallel Intel Non-Multiplexed Microprocessor Interface ........................................................................... 140
Per-Channel Software Reset ...................................................................................................................... 70
Global Register ........................................................................................................................................... 74
Per-Channel Register ................................................................................................................................. 75
Global Register ........................................................................................................................................... 78
Per-Channel Register ................................................................................................................................. 87
Device Identification Register (IDR) .......................................................................................................... 118
Bypass Register (BYP) ............................................................................................................................. 118
Boundary Scan Register (BSR) ................................................................................................................ 118
8.13.2.1 Read Cycle Specification .......................................................................................................... 138
8.13.2.2 Write Cycle Specification .......................................................................................................... 139
8.13.3.1 Read Cycle Specification .......................................................................................................... 140
8.13.3.2 Write Cycle Specification .......................................................................................................... 141
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
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February 6, 2009